{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T08:24:11Z","timestamp":1729671851153,"version":"3.28.0"},"reference-count":8,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/isqed.2003.1194738","type":"proceedings-article","created":{"date-parts":[[2004,3,22]],"date-time":"2004-03-22T09:34:28Z","timestamp":1079948068000},"page":"241-246","source":"Crossref","is-referenced-by-count":1,"title":["Active device under bond pad to save I\/O layout for high-pin-count SOC"],"prefix":"10.1109","author":[{"family":"Ming-Dou Ker","sequence":"first","affiliation":[]},{"family":"Jeng-Jie Peng","sequence":"additional","affiliation":[]},{"family":"Hsin-Chin Jiang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"crossref","first-page":"309","DOI":"10.1109\/TCAPT.2002.1010022","article-title":"Fully process-compatible layout design on bond pad to improve wire bond reliability in CMOS ICs","volume":"25","author":"ker","year":"2002","journal-title":"IEEE Trans on Components and Packaging Technologies"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/55.930685"},{"journal-title":"TSMC 0 35?m logic silicide SPQM 3 3V process PCM specification","year":"1998","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/16.974736"},{"journal-title":"Thermal Shock MIL-ST D-883E Method 1011 9","year":"1990","key":"ref8"},{"journal-title":"Temperature Cycling MIL-ST D-883E Method 1010 7","year":"1987","key":"ref7"},{"key":"ref2","first-page":"239","article-title":"Die cracking evaluation and improvement in ULSI plastic package","volume":"14","author":"chou","year":"2001","journal-title":"Proc IEEE Int Conf Microelectronic Test Structures"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/EOSESD.1999.818994"}],"event":{"name":"ISQED 2003: 4th International Symposium on Quality Electronic Design","acronym":"ISQED-03","location":"San Jose, CA, USA"},"container-title":["Fourth International Symposium on Quality Electronic Design, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8500\/26872\/01194738.pdf?arnumber=1194738","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,16]],"date-time":"2017-06-16T00:25:41Z","timestamp":1497572741000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1194738\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/isqed.2003.1194738","relation":{},"subject":[]}}