{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T10:28:43Z","timestamp":1725618523380},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,3]]},"DOI":"10.1109\/isqed.2009.4810317","type":"proceedings-article","created":{"date-parts":[[2009,4,3]],"date-time":"2009-04-03T18:50:11Z","timestamp":1238784611000},"page":"339-344","source":"Crossref","is-referenced-by-count":2,"title":["An efficient reliability evaluation approach for system-level design of embedded systems"],"prefix":"10.1109","author":[{"given":"Adeel","family":"Israr","sequence":"first","affiliation":[]},{"given":"Abdulhadi","family":"Shoufan","sequence":"additional","affiliation":[]},{"given":"Sorin A.","family":"Huss","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Analysis and Synthesis of Communication-Intensive Heterogeneous Real-Time Systems","year":"2003","author":"pop","key":"13"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1986.1676819"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1016\/0951-8320(93)90060-C"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1999.781037"},{"key":"2","first-page":"27","article-title":"ssd: an affordable fault tolerant architecture for superscalar processors","author":"kim","year":"2001","journal-title":"PRDC"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.10"},{"key":"10","doi-asserted-by":"crossref","first-page":"272","DOI":"10.1145\/157485.164890","article-title":"zero-suppressed bdds for set manipulation in combinatorial problems","author":"minato","year":"1993","journal-title":"30th ACM\/IEEE Design Automation Conference"},{"journal-title":"Fault Tolerant Design An Introduction","year":"2008","author":"dubrova","key":"7"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2004.1342457"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/OLT.2002.1030180"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1023\/A:1015047524985"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484824"},{"key":"8","first-page":"409","article-title":"reliability-aware system synthesis","author":"glab","year":"2007","journal-title":"Proceedings of Design Automation and Test in Europe"}],"event":{"name":"2009 10th International Symposium on Quality of Electronic Design (ISQED)","start":{"date-parts":[[2009,3,16]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2009,3,18]]}},"container-title":["2009 10th International Symposium on Quality of Electronic Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4804412\/4810250\/04810317.pdf?arnumber=4810317","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,18]],"date-time":"2017-06-18T18:34:34Z","timestamp":1497810874000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4810317\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,3]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/isqed.2009.4810317","relation":{},"subject":[],"published":{"date-parts":[[2009,3]]}}}