{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T21:33:40Z","timestamp":1762032820550,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,3]]},"DOI":"10.1109\/isqed.2009.4810340","type":"proceedings-article","created":{"date-parts":[[2009,4,3]],"date-time":"2009-04-03T14:50:11Z","timestamp":1238770211000},"page":"471-475","source":"Crossref","is-referenced-by-count":7,"title":["Standby power reduction and SRAM cell optimization for 65nm technology"],"prefix":"10.1109","author":[{"given":"S.","family":"Lakshminarayanan","sequence":"first","affiliation":[]},{"given":"J.","family":"Joung","sequence":"additional","affiliation":[]},{"given":"G.","family":"Narasimhan","sequence":"additional","affiliation":[]},{"given":"R.","family":"Kapre","sequence":"additional","affiliation":[]},{"given":"M.","family":"Slanina","sequence":"additional","affiliation":[]},{"given":"J.","family":"Tung","sequence":"additional","affiliation":[]},{"given":"M.","family":"Whately","sequence":"additional","affiliation":[]},{"given":"C-L.","family":"Hou","sequence":"additional","affiliation":[]},{"given":"W-J.","family":"Liao","sequence":"additional","affiliation":[]},{"given":"S-C.","family":"Lin","sequence":"additional","affiliation":[]},{"given":"P-G.","family":"Ma","sequence":"additional","affiliation":[]},{"given":"C-W.","family":"Fan","sequence":"additional","affiliation":[]},{"given":"M-C.","family":"Hsieh","sequence":"additional","affiliation":[]},{"given":"F-C.","family":"Liu","sequence":"additional","affiliation":[]},{"given":"K-L.","family":"Yeh","sequence":"additional","affiliation":[]},{"given":"W-C.","family":"Tseng","sequence":"additional","affiliation":[]},{"given":"S.W.","family":"Lu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.1994.324400"},{"year":"0","key":"2"},{"key":"1","article-title":"impact of cmos technology scaling on sram standby leakage reduction technique","author":"thomas","year":"2006","journal-title":"ICICDT '06"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696326"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1494078"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/RELPHY.2007.369863"},{"key":"4","first-page":"169","article-title":"monte carlo modeling of threshold voltage variation due to dopant fluctuations","volume":"1999","author":"frank","year":"1999","journal-title":"Symp VLSI Tech"}],"event":{"name":"2009 10th International Symposium on Quality of Electronic Design (ISQED)","start":{"date-parts":[[2009,3,16]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2009,3,18]]}},"container-title":["2009 10th International Symposium on Quality of Electronic Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4804412\/4810250\/04810340.pdf?arnumber=4810340","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T15:39:47Z","timestamp":1489765187000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4810340\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,3]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isqed.2009.4810340","relation":{},"subject":[],"published":{"date-parts":[[2009,3]]}}}