{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T21:33:40Z","timestamp":1762032820571},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,3]]},"DOI":"10.1109\/isqed.2009.4810372","type":"proceedings-article","created":{"date-parts":[[2009,4,3]],"date-time":"2009-04-03T14:50:11Z","timestamp":1238770211000},"page":"659-663","source":"Crossref","is-referenced-by-count":9,"title":["A 0.56-V 128kb 10T SRAM using column line assist (CLA) scheme"],"prefix":"10.1109","author":[{"given":"Shunsuke","family":"Okumura","sequence":"first","affiliation":[]},{"given":"Yusuke","family":"Iguchi","sequence":"additional","affiliation":[]},{"given":"Shusuke","family":"Yoshimoto","sequence":"additional","affiliation":[]},{"given":"Hidehiro","family":"Fujiwara","sequence":"additional","affiliation":[]},{"given":"Hiroki","family":"Noguchi","sequence":"additional","affiliation":[]},{"given":"Koji","family":"Nii","sequence":"additional","affiliation":[]},{"given":"Hiroshi","family":"Kawaguchi","sequence":"additional","affiliation":[]},{"given":"Masahiko","family":"Yoshimoto","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"3","DOI":"10.1093\/ietele\/e90-c.4.749"},{"doi-asserted-by":"publisher","key":"2","DOI":"10.1109\/JSSC.2005.864124"},{"doi-asserted-by":"publisher","key":"10","DOI":"10.1109\/ISQED.2006.122"},{"year":"0","key":"1"},{"doi-asserted-by":"publisher","key":"7","DOI":"10.1109\/ISSCC.2008.4523220"},{"year":"0","key":"6"},{"key":"5","first-page":"330","article-title":"a high-density subthreshold sram with data-independent bitline leakage and virtual ground replica scheme","author":"kim","year":"2007","journal-title":"ISSCC"},{"doi-asserted-by":"publisher","key":"4","DOI":"10.1109\/JSSC.1983.1051981"},{"doi-asserted-by":"publisher","key":"9","DOI":"10.1109\/JSSC.1987.1052809"},{"key":"8","first-page":"324","article-title":"a 1.1ghz 12a\/mb-leakage sram design in 65nm ultra-low-power cmos with integrated leakage reduction for mobile applications","author":"wang","year":"2007","journal-title":"ISSCC 2007"}],"event":{"name":"2009 10th International Symposium on Quality of Electronic Design (ISQED)","start":{"date-parts":[[2009,3,16]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2009,3,18]]}},"container-title":["2009 10th International Symposium on Quality of Electronic Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4804412\/4810250\/04810372.pdf?arnumber=4810372","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T14:55:23Z","timestamp":1489762523000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4810372\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,3]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/isqed.2009.4810372","relation":{},"subject":[],"published":{"date-parts":[[2009,3]]}}}