{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,7]],"date-time":"2024-09-07T01:31:53Z","timestamp":1725672713635},"reference-count":14,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/isqed.2010.5450407","type":"proceedings-article","created":{"date-parts":[[2010,4,20]],"date-time":"2010-04-20T09:45:07Z","timestamp":1271756707000},"page":"29-37","source":"Crossref","is-referenced-by-count":8,"title":["Adaptive power gating for function units in a microprocessor"],"prefix":"10.1109","author":[{"given":"Kimiyoshi","family":"Usami","sequence":"first","affiliation":[]},{"given":"Tatsunori","family":"Hashida","sequence":"additional","affiliation":[]},{"given":"Satoshi","family":"Koyama","sequence":"additional","affiliation":[]},{"given":"Tatsuya","family":"Yamamoto","sequence":"additional","affiliation":[]},{"given":"Daisuke","family":"Ikebuchi","sequence":"additional","affiliation":[]},{"given":"Hideharu","family":"Amano","sequence":"additional","affiliation":[]},{"given":"Mitaro","family":"Namiki","sequence":"additional","affiliation":[]},{"given":"Masaaki","family":"Kondo","sequence":"additional","affiliation":[]},{"given":"Hiroshi","family":"Nakamura","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICICDT.2009.5166253"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.2008.83"},{"key":"ref12","article-title":"Design and implementation of the POWER5TM microprocessor","author":"clabes","year":"2004","journal-title":"ISSCC Digest of Technical Papers"},{"key":"ref13","first-page":"120","author":"taur","year":"1998","journal-title":"Fundamentals of Modern VLSI Devices"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/978-0-387-68953-1_10"},{"key":"ref4","article-title":"A Fine-grain Dynamic Sleep Control Scheme in MIPS R3000","author":"seki","year":"2008","journal-title":"Proc ICCD'08"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2004.1349303"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2008.4484015"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2006.4380809"},{"key":"ref8","first-page":"261","article-title":"Optimizing static power dissipation by functional units in superscalar processors","author":"rele","year":"2002","journal-title":"Computational Complexity"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.Design.2009.63"},{"key":"ref2","first-page":"58","article-title":"A family of 45nm IA processors","author":"kumar","year":"2009","journal-title":"ISSCC Digest of Technical Papers"},{"key":"ref1","first-page":"292","article-title":"Hierarchical power distribution and power management scheme for a single chip mobile processor","author":"hattori","year":"2006","journal-title":"Proc Design Automation Conference"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2006.22"}],"event":{"name":"2010 11th International Symposium on Quality of Electronic Design (ISQED)","start":{"date-parts":[[2010,3,22]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2010,3,24]]}},"container-title":["2010 11th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5443864\/5450389\/05450407.pdf?arnumber=5450407","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T16:12:31Z","timestamp":1489853551000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5450407\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":14,"URL":"https:\/\/doi.org\/10.1109\/isqed.2010.5450407","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}