{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T15:10:53Z","timestamp":1725462653393},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/isqed.2010.5450474","type":"proceedings-article","created":{"date-parts":[[2010,4,20]],"date-time":"2010-04-20T09:45:07Z","timestamp":1271756707000},"page":"879-884","source":"Crossref","is-referenced-by-count":3,"title":["Coprocessor design space exploration using high level synthesis"],"prefix":"10.1109","author":[{"given":"Avinash","family":"Lakshminarayana","sequence":"first","affiliation":[]},{"given":"Sumit","family":"Ahuja","sequence":"additional","affiliation":[]},{"given":"Sandeep","family":"Shukla","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-540-70550-5_12","article-title":"Energy and performance evaluation of an fpga-based soc platform with aes and present coprocessors","author":"guo","year":"2008","journal-title":"8th International Workshop on Embedded Computer Systems Architectures Modeling and Simulation"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2009.81"},{"year":"0","key":"ref12"},{"year":"0","key":"ref13","article-title":"VCS Comprehensive RTL Verification Solution"},{"journal-title":"Bluespec Inc","article-title":"Bluespec","year":"0","key":"ref14"},{"article-title":"Handel-C Language Reference Manual RM-1003–4.0, 2003","year":"0","author":"celoxica","key":"ref15"},{"journal-title":"Mentor Graphics Corp","article-title":"Catapult Synthesis","year":"0","key":"ref16"},{"year":"0","key":"ref17","article-title":"C-to-silcon Compiler"},{"year":"0","key":"ref4","article-title":"C2R Compiler"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2004.1337598"},{"year":"0","key":"ref6","article-title":"Spartan-3E Starter Kit"},{"key":"ref5","article-title":"Statistical regression based power models for coprocessors for faster and accurate power estimation","author":"ahuja","year":"2009","journal-title":"22nd IEEE International SOC Conference"},{"year":"0","key":"ref8","article-title":"Xpower Analyzer"},{"year":"0","key":"ref7","article-title":"MicroBlaze Softcore Processor Core"},{"year":"0","key":"ref2","article-title":"GEZEL Language Information"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ACSD.2005.2"},{"journal-title":"Applied Cryptography","year":"1996","author":"schneier","key":"ref9"}],"event":{"name":"Eleventh International Symposium on Quality of Electronic Design (ISQED 2010)","start":{"date-parts":[[2010,3,22]]},"location":"San Jose, CA","end":{"date-parts":[[2010,3,24]]}},"container-title":["2010 11th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5443864\/5450389\/05450474.pdf?arnumber=5450474","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T03:19:33Z","timestamp":1497842373000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5450474\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/isqed.2010.5450474","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}