{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T23:57:21Z","timestamp":1729641441324,"version":"3.28.0"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/isqed.2010.5450532","type":"proceedings-article","created":{"date-parts":[[2010,4,20]],"date-time":"2010-04-20T09:45:07Z","timestamp":1271756707000},"page":"478-482","source":"Crossref","is-referenced-by-count":0,"title":["Methodology to ensure circuit robustness and exceptional silicon quality while proliferating designs across process revisions with high productivity"],"prefix":"10.1109","author":[{"given":"Nitin","family":"Srimal","sequence":"first","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1463891.1463945"},{"article-title":"Digital Integrated Circuits, A design perspective","year":"2003","author":"rabaey","key":"ref3"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"615401","DOI":"10.1117\/12.663289","article-title":"From optical proximity correction to lithography-driven physical design (1996&#x2013;2006): 10 years of resolution enhancement technology and the roadmap enablers for the next decade","volume":"6154","author":"capodieci","year":"0","journal-title":"Proceedings SPIE"},{"journal-title":"Pathmill\/Nanotime Synopsys","year":"0","key":"ref5"},{"key":"ref8","article-title":"Intel 45nm CMOS Technology","volume":"12","year":"0","journal-title":"Intel Technology Journal"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2004.839115"},{"article-title":"High speed CMOS design styles","year":"1988","author":"bernstein","key":"ref2"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1986.1052620"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1982.1051786"}],"event":{"name":"2010 11th International Symposium on Quality of Electronic Design (ISQED)","start":{"date-parts":[[2010,3,22]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2010,3,24]]}},"container-title":["2010 11th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5443864\/5450389\/05450532.pdf?arnumber=5450532","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T03:19:38Z","timestamp":1497842378000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5450532\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/isqed.2010.5450532","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}