{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T05:22:49Z","timestamp":1725427369591},"reference-count":15,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,3]]},"DOI":"10.1109\/isqed.2010.5450540","type":"proceedings-article","created":{"date-parts":[[2010,4,20]],"date-time":"2010-04-20T13:45:07Z","timestamp":1271771107000},"page":"422-427","source":"Crossref","is-referenced-by-count":1,"title":["Constraint analysis and debugging for multi-million instance SoC designs"],"prefix":"10.1109","author":[{"family":"Long Fei","sequence":"first","affiliation":[]},{"family":"Loa Mize","sequence":"additional","affiliation":[]},{"family":"Cho Moon","sequence":"additional","affiliation":[]},{"given":"Bill","family":"Mullen","sequence":"additional","affiliation":[]},{"given":"Sonia","family":"Singhal","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1057661.1057735"},{"year":"0","key":"ref11"},{"key":"ref12","article-title":"Timing Constraints in Galaxy Constraint Analyzer","author":"rajagopal","year":"2009","journal-title":"PrimeTime Special Interest Group Presentation Synopsys Users Group Conference"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378548"},{"year":"1995","author":"russell","key":"ref14"},{"year":"2009","key":"ref15","article-title":"Using the Synopsys Design Constraints Format"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.1998.669458"},{"article-title":"A Top-Down, Constraint-Driven Design Methodology for Analog Integrated Circuits","year":"1996","author":"chang","key":"ref3"},{"key":"ref6","doi-asserted-by":"crossref","first-page":"555","DOI":"10.1145\/74382.74475","article-title":"on the general false path problem in timing analysis","author":"du","year":"1989","journal-title":"26th ACM\/IEEE Design Automation Conference"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1132357.1132359"},{"key":"ref8","article-title":"Constraint Analysis and Debug","author":"komoda","year":"2009","journal-title":"Prime-Time Special Interest Group Presentation"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2004.1337564"},{"year":"0","key":"ref2","article-title":"Encounter Conformal Constraint Designer"},{"year":"0","key":"ref1","article-title":"The SpyGlass-Constraints"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SBCCI.1998.715450"}],"event":{"name":"2010 11th International Symposium on Quality of Electronic Design (ISQED)","start":{"date-parts":[[2010,3,22]]},"location":"San Jose, CA, USA","end":{"date-parts":[[2010,3,24]]}},"container-title":["2010 11th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5443864\/5450389\/05450540.pdf?arnumber=5450540","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T07:19:34Z","timestamp":1497856774000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5450540\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,3]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/isqed.2010.5450540","relation":{},"subject":[],"published":{"date-parts":[[2010,3]]}}}