{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T11:56:42Z","timestamp":1759147002660},"reference-count":16,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,3]]},"DOI":"10.1109\/isqed.2011.5770774","type":"proceedings-article","created":{"date-parts":[[2011,5,24]],"date-time":"2011-05-24T19:17:26Z","timestamp":1306264646000},"page":"1-6","source":"Crossref","is-referenced-by-count":2,"title":["Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools"],"prefix":"10.1109","author":[{"given":"Sophie","family":"Belloeil-Dupuis","sequence":"first","affiliation":[]},{"given":"Roselyne","family":"Chotin-Avot","sequence":"additional","affiliation":[]},{"given":"Habib","family":"Mehrez","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/SSST.1994.287845"},{"article-title":"Elementary Functions, Algorithms and Implementation","year":"1997","author":"muller","key":"ref11"},{"year":"0","key":"ref12"},{"key":"ref13","article-title":"A generic ASIC architecture for real time time-frequency analysis of non-stationary large bandwidth signals","author":"noury","year":"2007","journal-title":"IEEE instrumentation and measurement technology conference"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/RME.2008.4595745"},{"key":"ref15","article-title":"Computer arithmetic: Principles, architectures, and vlsi design","author":"zimmermann","year":"1997","journal-title":"Integrated Systems Laboratory ETH Zurich"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2009.28"},{"year":"0","key":"ref4"},{"year":"0","key":"ref3"},{"key":"ref6","first-page":"176","article-title":"Automatic Allocation of Redundant Operators in Arithmetic Data path Optimization","author":"belloeil","year":"2008","journal-title":"Conference on Design and Architectures for Signal and Image Processing"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ICM.2007.4497707"},{"year":"0","key":"ref8"},{"year":"0","key":"ref7"},{"year":"0","key":"ref2"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.317"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2000.857430"}],"event":{"name":"2011 International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2011,3,14]]},"location":"Santa Clara, CA, USA","end":{"date-parts":[[2011,3,16]]}},"container-title":["2011 12th International Symposium on Quality Electronic Design"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5764309\/5770683\/05770774.pdf?arnumber=5770774","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T07:42:43Z","timestamp":1490082163000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5770774\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,3]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/isqed.2011.5770774","relation":{},"subject":[],"published":{"date-parts":[[2011,3]]}}}