{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T02:13:06Z","timestamp":1729649586199,"version":"3.28.0"},"reference-count":31,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,3]]},"DOI":"10.1109\/isqed.2012.6187478","type":"proceedings-article","created":{"date-parts":[[2012,4,25]],"date-time":"2012-04-25T20:08:50Z","timestamp":1335384530000},"page":"84-90","source":"Crossref","is-referenced-by-count":4,"title":["A preliminary study on system-level impact of persistent main memory"],"prefix":"10.1109","author":[{"given":"Taciano","family":"Perez","sequence":"first","affiliation":[]},{"given":"Ney Laert Vilar","family":"Calazans","sequence":"additional","affiliation":[]},{"given":"Cesar A. F.","family":"De Rose","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"Non-Volatile Memory Emerging Technologies and Their Impacts on Memory Systems (TR-060)","year":"2010","author":"perez","key":"19"},{"journal-title":"Is Storage Hierarchy Dead? Co-located Compute-Storage NVRAM-based Architectures for Data-Centric Workloads","year":"2010","author":"roberts","key":"17"},{"key":"18","doi-asserted-by":"crossref","DOI":"10.1007\/978-3-031-01722-3","volume":"4","author":"barroso","year":"2009","journal-title":"The Datacenter as a Computer An Introduction to the Design of Warehouse-Scale Machines"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2011.18"},{"journal-title":"9th USENIX Symposium on Operating Systems Design and Implementation (OSDI '10)","year":"2010","author":"volos","key":"16"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.2008.4687366"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2009.5306582"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1038\/nature06932"},{"key":"21","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"key":"20","doi-asserted-by":"publisher","DOI":"10.1145\/1363189.1363198"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2010.24"},{"journal-title":"CACTI 5 1","year":"2008","author":"thoziyoor","key":"23"},{"key":"24","doi-asserted-by":"publisher","DOI":"10.1145\/1687399.1687449"},{"key":"25","doi-asserted-by":"crossref","first-page":"664","DOI":"10.1145\/1629911.1630086","article-title":"pdram: a hybrid pram and dram main memory system","author":"dhiman","year":"2009","journal-title":"2009 46th ACM\/IEEE Design Automation Conference dac"},{"key":"26","doi-asserted-by":"crossref","first-page":"554","DOI":"10.1145\/1391469.1391610","article-title":"Circuit and microarchitecture evaluation of 3D stacking magnetic RAM (MRAM) as a universal memory replacement","author":"dong","year":"2008","journal-title":"Design Automation Conference 2008 DAC 2008 45th ACM\/IEEE"},{"key":"27","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2009.5413145"},{"key":"28","doi-asserted-by":"crossref","first-page":"34","DOI":"10.1145\/1555815.1555761","article-title":"Hybrid cache architecture with disparate memory technologies","volume":"37","author":"wu","year":"2009","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"29","first-page":"737","article-title":"Power and performance of read-write aware hybrid caches with non-volatile memories","author":"wu","year":"0","journal-title":"Proceedings of the Conference on Design Automation and Test in Europe 2009"},{"journal-title":"Efficient Data Center Architectures Using Non-Volatile Memory and Reliability Techniques","year":"2011","author":"roberts","key":"3"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0449"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1038\/nnano.2008.160"},{"journal-title":"Memory Systems Cache","year":"2007","author":"jacob","key":"1"},{"key":"30","first-page":"14","article-title":"Operating system support for NVM+ DRAM hybrid main memory","author":"mogul","year":"2009","journal-title":"Proceedings of the 12th Conference on Hot Topics in Operating Systems"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2009.2024163"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555760"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/1555815.1555758"},{"key":"31","doi-asserted-by":"publisher","DOI":"10.1145\/1629575.1629589"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.1998.658762"},{"key":"9","doi-asserted-by":"crossref","first-page":"14","DOI":"10.1145\/1555815.1555759","article-title":"A durable and energy efficient main memory using phase change memory technology","volume":"37","author":"zhou","year":"2009","journal-title":"ACM SIGARCH Computer Architecture News"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1147\/rd.524.0465"}],"event":{"name":"2012 13th International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2012,3,19]]},"location":"Santa Clara, CA, USA","end":{"date-parts":[[2012,3,21]]}},"container-title":["Thirteenth International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6182938\/6187454\/06187478.pdf?arnumber=6187478","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,4,23]],"date-time":"2024-04-23T22:35:13Z","timestamp":1713911713000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6187478\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,3]]},"references-count":31,"URL":"https:\/\/doi.org\/10.1109\/isqed.2012.6187478","relation":{},"subject":[],"published":{"date-parts":[[2012,3]]}}}