{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T15:46:43Z","timestamp":1725464803974},"reference-count":18,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,3]]},"DOI":"10.1109\/isqed.2013.6523625","type":"proceedings-article","created":{"date-parts":[[2013,6,13]],"date-time":"2013-06-13T16:54:03Z","timestamp":1371142443000},"page":"294-299","source":"Crossref","is-referenced-by-count":0,"title":["Cost-driven 3D design optimization with metal layer reduction technique"],"prefix":"10.1109","author":[{"family":"Qiaosha Zou","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Jing Xie","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"family":"Yuan Xie","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2010.5653753"},{"year":"0","key":"18"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/43.920697"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.59"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1971.223159"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/92.902262"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2007.4397268"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/16.661220"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2008.5388564"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.136"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/1148015.1148016"},{"key":"10","article-title":"Silicon interposer with TSVs (Through Silicon Vias) and find multilayer wiring","author":"sunohara","year":"2008","journal-title":"ECTC"},{"key":"7","article-title":"3-D assembly interposer technology for next-generation integrated systems","author":"ohsawa","year":"2001","journal-title":"ISSCC IEEE International"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2011.5898608"},{"journal-title":"IC Knowledge LLC","year":"2012","key":"5"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2062811"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/3DIC.2010.5751469"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/EPTC.2009.5416509"}],"event":{"name":"2013 14th International Symposium on Quality Electronic Design (ISQED 2013)","start":{"date-parts":[[2013,3,4]]},"location":"Santa Clara, CA","end":{"date-parts":[[2013,3,6]]}},"container-title":["International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6520923\/6523572\/06523625.pdf?arnumber=6523625","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T23:42:07Z","timestamp":1490226127000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6523625\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,3]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/isqed.2013.6523625","relation":{},"subject":[],"published":{"date-parts":[[2013,3]]}}}