{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,22]],"date-time":"2024-10-22T17:28:30Z","timestamp":1729618110937,"version":"3.28.0"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,3]]},"DOI":"10.1109\/isqed.2013.6523648","type":"proceedings-article","created":{"date-parts":[[2013,6,13]],"date-time":"2013-06-13T16:54:03Z","timestamp":1371142443000},"page":"438-441","source":"Crossref","is-referenced-by-count":1,"title":["A cost-effective 45nm 6T-SRAM reducing 50mV V<inf>min<\/inf> and 53% standby leakage with multi-V<inf>t<\/inf> asymmetric halo MOS and write assist circuitry"],"prefix":"10.1109","author":[{"given":"K.","family":"Nii","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Yabuuchi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"H.","family":"Fujiwara","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Y.","family":"Tsukamoto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Y.","family":"Ishii","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Matsumura","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Y.","family":"Matsuda","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"crossref","first-page":"852","DOI":"10.1109\/LED.2009.2024014","article-title":"Relaxing confliet between read stability and writability in 6t sram cell using asymmetrie transistors","volume":"30","author":"kim","year":"2009","journal-title":"ED Letters"},{"key":"2","article-title":"A dynamie body-biased sram with asymmetrie halo implant mosfets","author":"yabuuehi","year":"2011","journal-title":"Proe Int Symp Low Power Eleetronies and Deviees (LSLPED)"},{"key":"1","first-page":"356","article-title":"A 0.5v 100mhz pd-sol sram with enhaneed read stability and write ability by asymmetrie mosfet","author":"nii","year":"2010","journal-title":"IEEE International Solid Cireuits Conferenee Dig Teeh Papers"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.891648"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.859025"},{"key":"5","first-page":"41","article-title":"70% read margin enhaneement by VTH mismateh self-repair in 6T-SRAM with asymmetrie pass gate transistor by zero additional eost, postproeess, loeal eleetron injeetion","author":"miyaji","year":"2010","journal-title":"VLSI Cireuits Symp Dig"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/ISDRS.2011.6135267"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373426"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.892153"}],"event":{"name":"2013 14th International Symposium on Quality Electronic Design (ISQED 2013)","start":{"date-parts":[[2013,3,4]]},"location":"Santa Clara, CA","end":{"date-parts":[[2013,3,6]]}},"container-title":["International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6520923\/6523572\/06523648.pdf?arnumber=6523648","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,21]],"date-time":"2017-06-21T10:35:49Z","timestamp":1498041349000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6523648\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,3]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/isqed.2013.6523648","relation":{},"subject":[],"published":{"date-parts":[[2013,3]]}}}