{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,3]],"date-time":"2024-09-03T19:16:24Z","timestamp":1725390984155},"reference-count":13,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,3]]},"DOI":"10.1109\/isqed.2017.7918319","type":"proceedings-article","created":{"date-parts":[[2017,5,4]],"date-time":"2017-05-04T16:32:38Z","timestamp":1493915558000},"page":"215-220","source":"Crossref","is-referenced-by-count":0,"title":["High sigma statistical hold time analysis in FinFET sequential circuits"],"prefix":"10.1109","author":[{"given":"Sam C.","family":"Lo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Taylor T.","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Aaron J.","family":"Barker","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2013.6650574"},{"key":"ref11","first-page":"11.6.1","article-title":"Self-heating on bulk FinFET from 14nm down to 7nm node","author":"jang","year":"2015","journal-title":"IEEE International Electron Devices Meeting"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2014.6931631"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4614-2269-3"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICICDT.2012.6232837"},{"key":"ref3","first-page":"79","article-title":"SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor","author":"konstadinidis","year":"2016","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2013.6629291"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2010.5450412"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"114","DOI":"10.1109\/ESSCIR.2006.307544","article-title":"Statisitical Characterization of Hold Time Violation in 130nm CMOS Technology","author":"neuberger","year":"2006","journal-title":"Proceedings of the 32nd European Solid-State Circuits Conference"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2009.4810272"},{"key":"ref2","first-page":"1","article-title":"Efficient high-sigma yield analysis for high dimensional problems","author":"zheng","year":"2014","journal-title":"Design Automation & Test in Europe Conference & Exhibition"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1146909.1146994"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/66.806125"}],"event":{"name":"2017 18th International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2017,3,14]]},"location":"Santa Clara, CA, USA","end":{"date-parts":[[2017,3,15]]}},"container-title":["2017 18th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7910185\/7918273\/07918319.pdf?arnumber=7918319","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2019,9,23]],"date-time":"2019-09-23T05:36:40Z","timestamp":1569217000000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7918319\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,3]]},"references-count":13,"URL":"https:\/\/doi.org\/10.1109\/isqed.2017.7918319","relation":{},"subject":[],"published":{"date-parts":[[2017,3]]}}}