{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T08:18:11Z","timestamp":1730276291611,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,3]]},"DOI":"10.1109\/isqed.2018.8357280","type":"proceedings-article","created":{"date-parts":[[2018,5,18]],"date-time":"2018-05-18T17:30:27Z","timestamp":1526664627000},"page":"151-155","source":"Crossref","is-referenced-by-count":0,"title":["Body-biasing assisted vmin optimization for 5nm-node multi-Vt FD-SOI 6T-SRAM"],"prefix":"10.1109","author":[{"given":"Jheng-Yi","family":"Chen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ming-Yu","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Shi-Hao","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jia-Wei","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Meng-Hsueh","family":"Chiang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"23","author":"shin","year":"2011","journal-title":"Advanced MOSFET designs and implications for SRAM scaling"},{"key":"ref3","first-page":"21","author":"carlson","year":"2008","journal-title":"Device and circuit techniques for reducing variation in nanoscale SRAM"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1987.1052809"},{"key":"ref5","doi-asserted-by":"crossref","first-page":"1244","DOI":"10.1109\/T-ED.1983.21282","article-title":"Threshold voltage of thin-film silicon-on-insulator (SOI) MOSFET's","volume":"30","author":"lim","year":"1983","journal-title":"IEEE Trans Electron Devices"},{"key":"ref7","first-page":"448","article-title":"Critical current (ICRIT) based SPICE model extraction for SRAM cell","author":"chen","year":"0","journal-title":"Proc 2008 IEEE International Conference on Solid-State and Integrated-Circuit Technology"},{"journal-title":"Sentaurus User's Manual Synopsys Inc Mountain View","year":"2013","key":"ref2"},{"journal-title":"Internationa Technology Roadmap for Semiconductors","year":"2013","key":"ref1"}],"event":{"name":"2018 19th International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2018,3,13]]},"location":"Santa Clara, CA","end":{"date-parts":[[2018,3,14]]}},"container-title":["2018 19th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8354411\/8357243\/08357280.pdf?arnumber=8357280","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,6,1]],"date-time":"2018-06-01T16:20:55Z","timestamp":1527870055000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8357280\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,3]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isqed.2018.8357280","relation":{},"subject":[],"published":{"date-parts":[[2018,3]]}}}