{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T08:19:55Z","timestamp":1730276395714,"version":"3.28.0"},"reference-count":17,"publisher":"IEEE","license":[{"start":{"date-parts":[[2021,4,7]],"date-time":"2021-04-07T00:00:00Z","timestamp":1617753600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,4,7]],"date-time":"2021-04-07T00:00:00Z","timestamp":1617753600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,4,7]],"date-time":"2021-04-07T00:00:00Z","timestamp":1617753600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2021,4,7]]},"DOI":"10.1109\/isqed51717.2021.9424357","type":"proceedings-article","created":{"date-parts":[[2021,5,10]],"date-time":"2021-05-10T20:09:51Z","timestamp":1620677391000},"page":"34-40","source":"Crossref","is-referenced-by-count":0,"title":["Efficient Reachability Analysis Based on Inductive Invariant Using X-value Based Flipflop Selection"],"prefix":"10.1109","author":[{"given":"Ryogo","family":"Koikel","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masahiro","family":"Fujita","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","first-page":"972","article-title":"Accurate CEGAR-Based ATPG in Presence of Unknown Values for Large Industrial Designs","author":"karsten scheibler","year":"2016","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2210422"},{"key":"ref12","article-title":"JW. Roorda: An Introduction to Symbolic Trajectory Evaluation","volume":"3965","author":"claessen","year":"2006","journal-title":"Formal Methods for Hardware Verification SFM 2006 Lecture Notes in Computer Science"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-21668-3_8"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/FMCAD.2017.8102233"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1989.100747"},{"journal-title":"ABC A System for Sequential Synthesis and Verification","article-title":"Berkeley Logic Synthesis and Verification Group","year":"0","key":"ref16"},{"key":"ref17","first-page":"125","article-title":"Efficient implementation of property directed reachability","author":"een","year":"2011","journal-title":"2011 Formal Methods in Computer-Aided Design (FMCAD) FMCAD"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-31612-8_10"},{"key":"ref3","article-title":"Symbolic Model Checking Using SAT Procedures instead of BDDs","author":"biere","year":"1999","journal-title":"Biere1999SymbolicMC"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2015.13"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2012.55"},{"key":"ref8","first-page":"463","article-title":"Automatic identification of assertions and invariants with small numbers of test vectors","author":"fujita","year":"2015","journal-title":"ICCD"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MEMCOD.2015.7340476"},{"key":"ref2","first-page":"430","volume":"3312","author":"zijiang","year":"2004","journal-title":"Variable Reuse for Efficient Image Computation"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"1451","DOI":"10.1109\/43.552079","article-title":"Automatic state space decomposition for approximate FSM traversal based on circuit analysis","volume":"15","author":"cho","year":"1996","journal-title":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2015.2440315"}],"event":{"name":"2021 22nd International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2021,4,7]]},"location":"Santa Clara, CA, USA","end":{"date-parts":[[2021,4,9]]}},"container-title":["2021 22nd International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9424228\/9424248\/09424357.pdf?arnumber=9424357","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T11:41:21Z","timestamp":1652182881000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9424357\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,4,7]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/isqed51717.2021.9424357","relation":{},"subject":[],"published":{"date-parts":[[2021,4,7]]}}}