{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T01:19:31Z","timestamp":1740100771759,"version":"3.37.3"},"reference-count":16,"publisher":"IEEE","license":[{"start":{"date-parts":[[2022,4,6]],"date-time":"2022-04-06T00:00:00Z","timestamp":1649203200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2022,4,6]],"date-time":"2022-04-06T00:00:00Z","timestamp":1649203200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100011039","name":"Intelligence Advanced Research Projects Activity","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100011039","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100006751","name":"U.S. Army","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006751","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2022,4,6]]},"DOI":"10.1109\/isqed54688.2022.9806261","type":"proceedings-article","created":{"date-parts":[[2022,6,29]],"date-time":"2022-06-29T19:46:20Z","timestamp":1656531980000},"page":"33-38","source":"Crossref","is-referenced-by-count":3,"title":["Simulation methodology for timing analysis and design optimization in digital superconducting electronics"],"prefix":"10.1109","author":[{"given":"Sam C.","family":"Lo","sequence":"first","affiliation":[{"name":"Synopsys Inc.,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Aaron J.","family":"Barker","sequence":"additional","affiliation":[{"name":"Synopsys Inc.,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Stephen R.","family":"Whiteley","sequence":"additional","affiliation":[{"name":"Synopsys Inc.,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Eric","family":"Mlinar","sequence":"additional","affiliation":[{"name":"Synopsys Inc.,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jiajun","family":"Chen","sequence":"additional","affiliation":[{"name":"Synopsys Inc.,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Dehuang","family":"Wu","sequence":"additional","affiliation":[{"name":"Synopsys Inc.,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kishore","family":"Singhal","sequence":"additional","affiliation":[{"name":"Synopsys Inc.,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICMTS.2004.1309484"},{"key":"ref11","article-title":"CMOS transistor mismatch model with temperature effect for HSPICE and SPECTRE","author":"tan","year":"2004","journal-title":"Proceedings 7th International Conference on Solid-State and Integrated Circuits Technology"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2021.3058088"},{"journal-title":"Principles of Superconductive Devices and Circuits","year":"1981","author":"van duzer","key":"ref13"},{"journal-title":"Introduction to Superconducting Circuits","year":"1999","author":"kadin","key":"ref14"},{"year":"0","key":"ref15"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2017.2677418"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1063\/1.4948618"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISEC.2017.8314240"},{"journal-title":"PSCAN2 Superconductor Circuit Simulator [Online]","year":"0","key":"ref6"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2019.2897312"},{"journal-title":"IARPA SuperTools Program","year":"0","key":"ref8"},{"journal-title":"WRCAD public domain tools","year":"0","key":"ref7"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TASC.2013.2244634"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/77.80745"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISEC46533.2019.8990931"}],"event":{"name":"2022 23rd International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2022,4,6]]},"location":"Santa Clara, CA, USA","end":{"date-parts":[[2022,4,7]]}},"container-title":["2022 23rd International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9806045\/9806137\/09806261.pdf?arnumber=9806261","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,7,25]],"date-time":"2022-07-25T20:14:19Z","timestamp":1658780059000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9806261\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,4,6]]},"references-count":16,"URL":"https:\/\/doi.org\/10.1109\/isqed54688.2022.9806261","relation":{},"subject":[],"published":{"date-parts":[[2022,4,6]]}}}