{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T08:20:32Z","timestamp":1730276432113,"version":"3.28.0"},"reference-count":26,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,4,5]],"date-time":"2023-04-05T00:00:00Z","timestamp":1680652800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,4,5]],"date-time":"2023-04-05T00:00:00Z","timestamp":1680652800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,4,5]]},"DOI":"10.1109\/isqed57927.2023.10129315","type":"proceedings-article","created":{"date-parts":[[2023,5,24]],"date-time":"2023-05-24T17:33:09Z","timestamp":1684949589000},"page":"1-8","source":"Crossref","is-referenced-by-count":0,"title":["ZOCHEN: Compression Using Zero Chain Elimination and Encoding to Improve Endurance of Non-Volatile Memories"],"prefix":"10.1109","author":[{"given":"Nishant","family":"Bharti","sequence":"first","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,Assam,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Arijit","family":"Nath","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,Assam,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Swati","family":"Upadhyay","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,Assam,India"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hemangee K.","family":"Kapoor","sequence":"additional","affiliation":[{"name":"Indian Institute of Technology,Department of Computer Science and Engineering,Guwahati,Assam,India"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.23919\/DATE.2018.8342271"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1145\/3316781.3317760"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1109\/HPCA.2013.6522321"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1109\/ICCD53106.2021.00044"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1145\/1555754.1555758"},{"key":"ref10","first-page":"788","article-title":"A study on the challenges and prospects of pcm based main memory architectures","volume":"18","author":"rajarajan","year":"2013","journal-title":"Middle-East Journal of Scientific Research"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1109\/ISCAS.2007.377981"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/IEDM.2010.5703348"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1145\/3195970.3196007"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1145\/2744769.2755440"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1145\/3531437.3539716"},{"key":"ref18","article-title":"Space-oblivious compression and wear leveling for non-volatile main memories","author":"liu","year":"2020","journal-title":"Proc the 36th International Conference on Massive Storage Systems and Technology"},{"doi-asserted-by":"publisher","key":"ref24","DOI":"10.1145\/2024716.2024718"},{"doi-asserted-by":"publisher","key":"ref23","DOI":"10.1109\/TC.2021.3126156"},{"doi-asserted-by":"publisher","key":"ref26","DOI":"10.1145\/1186736.1186737"},{"doi-asserted-by":"publisher","key":"ref25","DOI":"10.1109\/ISVLSI.2012.82"},{"doi-asserted-by":"publisher","key":"ref20","DOI":"10.1109\/DAC.2018.8465896"},{"key":"ref22","first-page":"1","article-title":"WIB-SAR: Write intensity based selective address remapping","author":"aswathy ns","year":"2023","journal-title":"VLSID 2023"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1145\/1669112.1669117"},{"doi-asserted-by":"publisher","key":"ref8","DOI":"10.23919\/DATE.2018.8342271"},{"key":"ref7","doi-asserted-by":"crossref","first-page":"377","DOI":"10.1145\/2370816.2370870","article-title":"Base-Delta-Immediate Compression: Practical Data Compression for On-Chip Caches","author":"gennady pekhimenko","year":"2012","journal-title":"In International Conference on Parallel Architectures and Compilation Techniques (PACT)"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/IGCC.2011.6008569"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/TCAD.2019.2962127"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1145\/1669112.1669157"},{"key":"ref6","article-title":"Frequent pattern compression: A significance-based compression scheme for l2 caches","author":"alameldeen","year":"2004","journal-title":"Tech Rep"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1145\/2742060.2742110"}],"event":{"name":"2023 24th International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2023,4,5]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2023,4,7]]}},"container-title":["2023 24th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10129281\/10129282\/10129315.pdf?arnumber=10129315","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,12]],"date-time":"2023-06-12T17:55:27Z","timestamp":1686592527000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10129315\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4,5]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/isqed57927.2023.10129315","relation":{},"subject":[],"published":{"date-parts":[[2023,4,5]]}}}