{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,6]],"date-time":"2024-09-06T21:22:52Z","timestamp":1725657772803},"reference-count":18,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,4,5]],"date-time":"2023-04-05T00:00:00Z","timestamp":1680652800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,4,5]],"date-time":"2023-04-05T00:00:00Z","timestamp":1680652800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,4,5]]},"DOI":"10.1109\/isqed57927.2023.10129333","type":"proceedings-article","created":{"date-parts":[[2023,5,24]],"date-time":"2023-05-24T17:33:09Z","timestamp":1684949589000},"page":"1-8","source":"Crossref","is-referenced-by-count":0,"title":["Design of Hardware Accelerators to Compute Parametric Capacitance Tables"],"prefix":"10.1109","author":[{"given":"Sandeep","family":"Koranne","sequence":"first","affiliation":[{"name":"Siemens EDA,Wilsonville,Oregon"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/j.softx.2020.100464"},{"journal-title":"GF180nm MCU PDK","year":"0","key":"ref12"},{"journal-title":"Trefethen Lightning Laplace Solver","year":"2022","key":"ref15"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714992"},{"journal-title":"skywater-pdk","year":"0","key":"ref11"},{"key":"ref10","article-title":"CNN-Cap: Effective Convolutional Neural Network Based Capacitance Models for Interconnect Capacitance Extraction","author":"yang","year":"2022","journal-title":"ACM TODAES"},{"journal-title":"Catapult RTL Syntheis","year":"2022","key":"ref2"},{"journal-title":"Computational Electromagnetics","year":"2012","author":"bondeson","key":"ref1"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/20.717799"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1002\/nme.2579"},{"journal-title":"Analytical and Computational Methods in Electromagnetics","year":"2008","author":"garg","key":"ref18"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/3289602.3294004"},{"journal-title":"Oasys-RTL Synthesis","year":"2022","key":"ref7"},{"key":"ref9","first-page":"371","article-title":"A Fast and Accurate Middle End of Line Parasitic Capacitance Extraction for MOSFET and FinFET Technologies Using Machine Learning","author":"saleh","year":"0","journal-title":"ASP-DAC 2022"},{"journal-title":"ITF Format Synopsys","year":"2022","key":"ref4"},{"journal-title":"Calibre xACT Extraction","year":"0","key":"ref3"},{"journal-title":"The Finite Element Method in Electromagnetics","year":"2002","author":"jin","key":"ref6"},{"journal-title":"Xilinx Computational Storage","year":"2022","key":"ref5"}],"event":{"name":"2023 24th International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2023,4,5]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2023,4,7]]}},"container-title":["2023 24th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10129281\/10129282\/10129333.pdf?arnumber=10129333","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2023,6,12]],"date-time":"2023-06-12T17:55:11Z","timestamp":1686592511000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10129333\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4,5]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/isqed57927.2023.10129333","relation":{},"subject":[],"published":{"date-parts":[[2023,4,5]]}}}