{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:42:00Z","timestamp":1773247320430,"version":"3.50.1"},"reference-count":55,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,4,5]],"date-time":"2023-04-05T00:00:00Z","timestamp":1680652800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,4,5]],"date-time":"2023-04-05T00:00:00Z","timestamp":1680652800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,4,5]]},"DOI":"10.1109\/isqed57927.2023.10129368","type":"proceedings-article","created":{"date-parts":[[2023,5,24]],"date-time":"2023-05-24T17:33:09Z","timestamp":1684949589000},"page":"1-7","source":"Crossref","is-referenced-by-count":14,"title":["DK Lock: Dual Key Logic Locking Against Oracle-Guided Attacks"],"prefix":"10.1109","author":[{"given":"Jordan","family":"Maynard","sequence":"first","affiliation":[{"name":"California State University Long Beach,Computer Engineering &amp; Computer Science Department,Long Beach,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Amin","family":"Rezaei","sequence":"additional","affiliation":[{"name":"California State University Long Beach,Computer Engineering &amp; Computer Science Department,Long Beach,CA,USA"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484823"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228377"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2015.7140252"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2016.7495588"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-662-53140-2_7"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2018.8297317"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/3133956.3133985"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116500"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD45719.2019.8942076"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8341984"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3287691"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2019.00102"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3053912"},{"key":"ref14","first-page":"1","article-title":"Full-Lock: Hard distributions of SAT instances for obfuscating circuits using fully configurable logic and routing blocks","volume-title":"In Proceedings of Design Automation Conference (DAC)","author":"Kamali"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3194554.3194580"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3299874.3317992"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9473910"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD51958.2021.9643548"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/AsianHOST53231.2021.9699758"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2019.2963094"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2018.2797019"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.23919\/date.2018.8341985"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062226"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/HOST45689.2020.9300256"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/HOST54066.2022.9840128"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3100275"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586159"},{"key":"ref28","article-title":"Vulnerability and remedy of stripped function logic locking","volume-title":"In Cyptology ePrint Archive, report 2019\/139","author":"Zhou","year":"2019"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/DAC18074.2021.9586314"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/HOST54066.2022.9839821"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/3526241.3530372"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2028166"},{"key":"ref33","first-page":"1","article-title":"Active hardware metering for intellectual property protection and security","volume-title":"In USENIX Security Symposium on USENIX Security Symposium","author":"Alkabani"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774729"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS48704.2020.9184664"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474002"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203759"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.23919\/DATE51398.2021.9474118"},{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8714924"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1145\/3060403.3060469"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2017.2740364"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2018.8342086"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2020.2968183"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2017.8203757"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2019.8697421"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2022.3149147"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774691"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1145\/3287624.3287670"},{"key":"ref49","first-page":"1","article-title":"Evaluating the security of eFPGA-based redaction algorithms","volume-title":"In Proceedings of IEEE\/ACM International Conference on Computer-Aided Design (IC-CAD)","author":"Rezaei"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1145\/3453688.3461760"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116261"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.23919\/DATE.2019.8715053"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1989.100747"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1999.805857"},{"key":"ref55","article-title":"ABC: A system for sequential synthesis and verification"}],"event":{"name":"2023 24th International Symposium on Quality Electronic Design (ISQED)","location":"San Francisco, CA, USA","start":{"date-parts":[[2023,4,5]]},"end":{"date-parts":[[2023,4,7]]}},"container-title":["2023 24th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10129281\/10129282\/10129368.pdf?arnumber=10129368","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,1]],"date-time":"2024-03-01T05:37:17Z","timestamp":1709271437000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10129368\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,4,5]]},"references-count":55,"URL":"https:\/\/doi.org\/10.1109\/isqed57927.2023.10129368","relation":{},"subject":[],"published":{"date-parts":[[2023,4,5]]}}}