{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:32:33Z","timestamp":1763458353509},"reference-count":27,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,4,3]],"date-time":"2024-04-03T00:00:00Z","timestamp":1712102400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,4,3]],"date-time":"2024-04-03T00:00:00Z","timestamp":1712102400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100002701","name":"Ministry of Education","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100002701","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,4,3]]},"DOI":"10.1109\/isqed60706.2024.10528682","type":"proceedings-article","created":{"date-parts":[[2024,5,16]],"date-time":"2024-05-16T17:21:18Z","timestamp":1715880078000},"page":"1-8","source":"Crossref","is-referenced-by-count":6,"title":["Merits of Time-Domain Computing for VMM \u2013 A Quantitative Comparison"],"prefix":"10.1109","author":[{"given":"Florian","family":"Freye","sequence":"first","affiliation":[{"name":"Rwth Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jie","family":"Lou","sequence":"additional","affiliation":[{"name":"Rwth Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christian","family":"Lanius","sequence":"additional","affiliation":[{"name":"Rwth Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tobias","family":"Gemmeke","sequence":"additional","affiliation":[{"name":"Rwth Aachen University,Chair of Integrated Digital Systems and Circuit Design,Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365766"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731659"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED52811.2021.9502505"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS51556.2021.9401665"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3031290"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2023.3269098"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC55480.2022.9911382"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED58423.2023.10244608"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2881288"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1162\/089976698300017052"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2020.3020286"},{"article-title":"ADC Performance Survey 1997-2023","year":"2023","author":"Murmann","key":"ref12"},{"key":"ref13","article-title":"Benchmarking and Modeling of Analog and Digital SRAM In-Memory Computing Architectures","author":"Houshmand","year":"2023","journal-title":"arXiv"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2019.2914361"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2284363"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731681"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3095232"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSC49989.2020.9180202"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3048726"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2021.3088857"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2934583.2934585"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JXCDC.2022.3217098"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2020.3021066"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS51556.2021.9401758"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2021.3083275"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/EBCCSP51266.2020.9291366"},{"key":"ref27","article-title":"Learned Step Size Quantization","author":"Esser","year":"2020","journal-title":"arXiv"}],"event":{"name":"2024 25th International Symposium on Quality Electronic Design (ISQED)","start":{"date-parts":[[2024,4,3]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2024,4,5]]}},"container-title":["2024 25th International Symposium on Quality Electronic Design (ISQED)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10528356\/10528364\/10528682.pdf?arnumber=10528682","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,5,17]],"date-time":"2024-05-17T05:08:25Z","timestamp":1715922505000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10528682\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,4,3]]},"references-count":27,"URL":"https:\/\/doi.org\/10.1109\/isqed60706.2024.10528682","relation":{},"subject":[],"published":{"date-parts":[[2024,4,3]]}}}