{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T09:13:04Z","timestamp":1763457184327,"version":"build-2065373602"},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2009,2]]},"DOI":"10.1109\/isscc.2009.4977517","type":"proceedings-article","created":{"date-parts":[[2009,6,3]],"date-time":"2009-06-03T17:51:36Z","timestamp":1244051496000},"page":"480-481,481a","source":"Crossref","is-referenced-by-count":49,"title":["An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM"],"prefix":"10.1109","author":[{"given":"K.","family":"Niitsu","sequence":"first","affiliation":[]},{"given":"Y.","family":"Shimazaki","sequence":"additional","affiliation":[]},{"given":"Y.","family":"Sugimori","sequence":"additional","affiliation":[]},{"given":"Y.","family":"Kohama","sequence":"additional","affiliation":[]},{"given":"K.","family":"Kasuga","sequence":"additional","affiliation":[]},{"given":"I.","family":"Nonomura","sequence":"additional","affiliation":[]},{"given":"M.","family":"Saen","sequence":"additional","affiliation":[]},{"given":"S.","family":"Komatsu","sequence":"additional","affiliation":[]},{"given":"K.","family":"Osada","sequence":"additional","affiliation":[]},{"given":"N.","family":"Irie","sequence":"additional","affiliation":[]},{"given":"T.","family":"Hattori","sequence":"additional","affiliation":[]},{"given":"A.","family":"Hasegawa","sequence":"additional","affiliation":[]},{"given":"T.","family":"Kuroda","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523175"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373441"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523071"},{"key":"6","first-page":"131","article-title":"interference from power\/signal lines and to sram circuits in 65nm cmos inductive-coupling link","author":"niitsu","year":"2007","journal-title":"A-SSCC Dig Tech Papers"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.886554"},{"key":"4","first-page":"264","article-title":"a 0.14pj\/b inductive-coupling inter-chip data transceiver with digitally-controlled precise pulse shaping","author":"miura","year":"2007","journal-title":"ISSCC Dig Tech Papers"}],"event":{"name":"2009 IEEE International Solid-State Circuits Conference (ISSCC 2009)","start":{"date-parts":[[2009,2,8]]},"location":"San Francisco, CA","end":{"date-parts":[[2009,2,12]]}},"container-title":["2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/4926119\/4977283\/04977517.pdf?arnumber=4977517","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,17]],"date-time":"2017-03-17T19:42:09Z","timestamp":1489779729000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4977517\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,2]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/isscc.2009.4977517","relation":{},"subject":[],"published":{"date-parts":[[2009,2]]}}}