{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,5]],"date-time":"2025-07-05T04:46:24Z","timestamp":1751690784450,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2010,2]]},"DOI":"10.1109\/isscc.2010.5433840","type":"proceedings-article","created":{"date-parts":[[2010,3,24]],"date-time":"2010-03-24T14:35:14Z","timestamp":1269441314000},"page":"480-481","source":"Crossref","is-referenced-by-count":11,"title":["A 86MHz-to-12GHz digital-intensive phase-modulated fractional-N PLL using a 15pJ\/Shot 5ps TDC in 40nm digital CMOS"],"prefix":"10.1109","author":[{"given":"Jonathan","family":"Borremans","sequence":"first","affiliation":[]},{"given":"Kameswaran","family":"Vengattaramane","sequence":"additional","affiliation":[]},{"given":"Vito","family":"Giannini","sequence":"additional","affiliation":[]},{"given":"Jan","family":"Craninckx","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2012363"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"2182","DOI":"10.1109\/JSSC.2009.2022304","article-title":"A Digital Intensive Fractional-N PLL and All-Digital Self-Calibration Schemes","volume":"44","author":"ping-ying","year":"2009","journal-title":"J Solid-State Circuits"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.922712"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917405"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523197"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2005.1493996"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2005704"}],"event":{"name":"2010 IEEE International Solid- State Circuits Conference - (ISSCC)","start":{"date-parts":[[2010,2,7]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2010,2,11]]}},"container-title":["2010 IEEE International Solid-State Circuits Conference - (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5428240\/5433812\/05433840.pdf?arnumber=5433840","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,19]],"date-time":"2017-06-19T06:30:03Z","timestamp":1497853803000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5433840\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,2]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isscc.2010.5433840","relation":{},"subject":[],"published":{"date-parts":[[2010,2]]}}}