{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,10,3]],"date-time":"2026-10-03T20:21:01Z","timestamp":1791058861917,"version":"4.1.0"},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,2]]},"DOI":"10.1109\/isscc.2011.5746231","type":"proceedings-article","created":{"date-parts":[[2011,4,8]],"date-time":"2011-04-08T23:44:40Z","timestamp":1302306280000},"page":"88-90","source":"Crossref","is-referenced-by-count":7,"title":["A 2.9-to-4.0GHz fractional-N digital PLL with bang-bang phase detector and 560fs<inf>rms<\/inf> integrated jitter at 4.5mW power"],"prefix":"10.1109","author":[{"given":"Davide","family":"Tasca","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Marco","family":"Zanuso","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Giovanni","family":"Marzin","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Salvatore","family":"Levantino","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Carlo","family":"Samori","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Andrea L.","family":"Lacaita","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433842"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373439"},{"key":"ref6","first-page":"139","article-title":"A 2.2GHz Sub-Sampling PLL with 0.16psrms Jitter and -125dBc\/Hz In-Band Phase Noise at 700?W Loop-Components Power","author":"gao","year":"2010","journal-title":"IEEE Symp on VLSI Circuits"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2008.925948"},{"key":"ref2","first-page":"480","article-title":"A 86MHz to-12GHz Digital-Intensive Phase-Modulated Fractional-N PLL Using a 15pJ\/Shot 5ps TDC in 40nm digital CMOS","author":"borremans","year":"2010","journal-title":"ISSCC Dig Tech Papers"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433846"}],"event":{"name":"2011 IEEE International Solid- State Circuits Conference - (ISSCC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2011,2,20]]},"end":{"date-parts":[[2011,2,24]]}},"container-title":["2011 IEEE International Solid-State Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5740653\/5746170\/05746231.pdf?arnumber=5746231","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T07:19:44Z","timestamp":1490080784000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5746231\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,2]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/isscc.2011.5746231","relation":{},"subject":[],"published":{"date-parts":[[2011,2]]}}}