{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,5]],"date-time":"2025-12-05T12:10:17Z","timestamp":1764936617995},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,2]]},"DOI":"10.1109\/isscc.2012.6176950","type":"proceedings-article","created":{"date-parts":[[2012,4,5]],"date-time":"2012-04-05T17:40:15Z","timestamp":1333647615000},"page":"132-134","source":"Crossref","is-referenced-by-count":8,"title":["A 0.4mW\/Gb\/s 16Gb\/s near-ground receiver front-end with replica transconductance termination calibration"],"prefix":"10.1109","author":[{"given":"Kambiz","family":"Kaviani","sequence":"first","affiliation":[]},{"given":"Amir","family":"Amirkhany","sequence":"additional","affiliation":[]},{"given":"Charlie","family":"Huang","sequence":"additional","affiliation":[]},{"given":"Phuong","family":"Le","sequence":"additional","affiliation":[]},{"given":"Chris","family":"Madden","sequence":"additional","affiliation":[]},{"given":"Keisuke","family":"Saito","sequence":"additional","affiliation":[]},{"given":"Koji","family":"Sano","sequence":"additional","affiliation":[]},{"given":"Vinod","family":"Murugan","sequence":"additional","affiliation":[]},{"given":"Wendem","family":"Beyene","sequence":"additional","affiliation":[]},{"given":"Ken","family":"Chang","sequence":"additional","affiliation":[]},{"given":"Chuck","family":"Yuan","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","first-page":"232","article-title":"A 12.8Gb\/s\/link, tri-modal single-ended memory interface for graphics application","author":"amirkhany","year":"2011","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.908692"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.825259"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2011.5746260"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/101.55332"},{"key":"4","first-page":"234","article-title":"A 20Gbps\/link tri-modal differential\/GDDR5\/DDR3 Memory Interface","author":"kaviani","year":"2011","journal-title":"Symp VLSI Circuits Dig Tech Papers"}],"event":{"name":"2012 IEEE International Solid- State Circuits Conference - (ISSCC)","start":{"date-parts":[[2012,2,19]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2012,2,23]]}},"container-title":["2012 IEEE International Solid-State Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6171933\/6176863\/06176950.pdf?arnumber=6176950","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T19:26:01Z","timestamp":1490124361000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6176950\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,2]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/isscc.2012.6176950","relation":{},"subject":[],"published":{"date-parts":[[2012,2]]}}}