{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,27]],"date-time":"2026-02-27T15:34:43Z","timestamp":1772206483457,"version":"3.50.1"},"reference-count":4,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,2]]},"DOI":"10.1109\/isscc.2012.6176987","type":"proceedings-article","created":{"date-parts":[[2012,4,5]],"date-time":"2012-04-05T13:40:15Z","timestamp":1333633215000},"page":"182-184","source":"Crossref","is-referenced-by-count":30,"title":["A 1.45GHz 52-to-162GFLOPS\/W variable-precision floating-point fused multiply-add unit with certainty tracking in 32nm CMOS"],"prefix":"10.1109","author":[{"given":"Himanshu","family":"Kaul","sequence":"first","affiliation":[]},{"given":"Mark","family":"Anders","sequence":"additional","affiliation":[]},{"given":"Sanu","family":"Mathew","sequence":"additional","affiliation":[]},{"given":"Steven","family":"Hsu","sequence":"additional","affiliation":[]},{"given":"Amit","family":"Agarwal","sequence":"additional","affiliation":[]},{"given":"Farhana","family":"Sheikh","sequence":"additional","affiliation":[]},{"given":"Ram","family":"Krishnamurthy","sequence":"additional","affiliation":[]},{"given":"Shekhar","family":"Borkar","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/12.859535"},{"key":"2","first-page":"436","article-title":"4GHz+ Low-Latency Fixed-Point and Binary Floating-Point Execution Units for the POWER6 Processor","author":"curran","year":"2006","journal-title":"ISSCC Dig Tech Papers"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870924"},{"key":"4","first-page":"1","article-title":"A 32nm SoC platform technology with 2nd generation highk\/metal gate transistors optimized for ultra low power, high performance, and high density product applications","author":"jan","year":"2009","journal-title":"IEEE IEDM Dig Tech Papers"}],"event":{"name":"2012 IEEE International Solid- State Circuits Conference - (ISSCC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2012,2,19]]},"end":{"date-parts":[[2012,2,23]]}},"container-title":["2012 IEEE International Solid-State Circuits Conference"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6171933\/6176863\/06176987.pdf?arnumber=6176987","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T15:13:43Z","timestamp":1490109223000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6176987\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,2]]},"references-count":4,"URL":"https:\/\/doi.org\/10.1109\/isscc.2012.6176987","relation":{},"subject":[],"published":{"date-parts":[[2012,2]]}}}