{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T11:48:39Z","timestamp":1763466519301},"reference-count":4,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,2]]},"DOI":"10.1109\/isscc.2015.7062934","type":"proceedings-article","created":{"date-parts":[[2015,3,20]],"date-time":"2015-03-20T17:20:29Z","timestamp":1426872029000},"page":"1-3","source":"Crossref","is-referenced-by-count":21,"title":["4.5 The Xeon® processor E5-2600 v3: A 22nm 18-core product family"],"prefix":"10.1109","author":[{"given":"Bill","family":"Bowhill","sequence":"first","affiliation":[]},{"given":"Blaine","family":"Stackhouse","sequence":"additional","affiliation":[]},{"given":"Nevine","family":"Nassif","sequence":"additional","affiliation":[]},{"given":"Zibing","family":"Yang","sequence":"additional","affiliation":[]},{"given":"Arvind","family":"Raghavan","sequence":"additional","affiliation":[]},{"given":"Charles","family":"Morganti","sequence":"additional","affiliation":[]},{"given":"Chris","family":"Houghton","sequence":"additional","affiliation":[]},{"given":"Dan","family":"Krueger","sequence":"additional","affiliation":[]},{"given":"Olivier","family":"Franza","sequence":"additional","affiliation":[]},{"given":"Jayen","family":"Desai","sequence":"additional","affiliation":[]},{"given":"Jason","family":"Crop","sequence":"additional","affiliation":[]},{"given":"Dave","family":"Bradley","sequence":"additional","affiliation":[]},{"given":"Chris","family":"Bostak","sequence":"additional","affiliation":[]},{"given":"Sal","family":"Bhimji","sequence":"additional","affiliation":[]},{"given":"Matt","family":"Becker","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"432","article-title":"FIVR - Fully Integrated Voltage Regulators on 4th Generation Intel Core SoCs","author":"burton","year":"2014","journal-title":"IEEE Applied Power Electronics Conf"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757356"},{"key":"ref2","first-page":"131","article-title":"A 22nm High Performance and Low-Power CMOS Technology Featuring Fully Depleted Tri-Gate Transistors, Self-Aligned Contacts and High Density MIM Capacitors","author":"auth","year":"2012","journal-title":"Svmp on VLSI Technol"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757361"}],"event":{"name":"2015 IEEE International Solid- State Circuits Conference - (ISSCC)","start":{"date-parts":[[2015,2,22]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2015,2,26]]}},"container-title":["2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7054075\/7062838\/07062934.pdf?arnumber=7062934","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,24]],"date-time":"2017-03-24T04:03:05Z","timestamp":1490328185000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7062934\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,2]]},"references-count":4,"URL":"https:\/\/doi.org\/10.1109\/isscc.2015.7062934","relation":{},"subject":[],"published":{"date-parts":[[2015,2]]}}}