{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,3]],"date-time":"2025-10-03T13:16:25Z","timestamp":1759497385464},"reference-count":5,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,2]]},"DOI":"10.1109\/isscc.2015.7063048","type":"proceedings-article","created":{"date-parts":[[2015,3,20]],"date-time":"2015-03-20T17:20:29Z","timestamp":1426872029000},"page":"1-3","source":"Crossref","is-referenced-by-count":5,"title":["16.9 A 128kb 4b\/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using V<inf>t<\/inf>, cancel write method"],"prefix":"10.1109","author":[{"given":"Takanori","family":"Matsuzaki","sequence":"first","affiliation":[]},{"given":"Tatsuya","family":"Onuki","sequence":"additional","affiliation":[]},{"given":"Shuhei","family":"Nagatsuka","sequence":"additional","affiliation":[]},{"given":"Hiroki","family":"Inoue","sequence":"additional","affiliation":[]},{"given":"Takahiko","family":"Ishizu","sequence":"additional","affiliation":[]},{"given":"Yoshinori","family":"Ieda","sequence":"additional","affiliation":[]},{"given":"Naoto","family":"Yamade","sequence":"additional","affiliation":[]},{"given":"Hidekazu","family":"Miyairi","sequence":"additional","affiliation":[]},{"given":"Masayuki","family":"Sakakura","sequence":"additional","affiliation":[]},{"given":"Tomoaki","family":"Atsumi","sequence":"additional","affiliation":[]},{"given":"Yutaka","family":"Shionoiri","sequence":"additional","affiliation":[]},{"given":"Kiyoshi","family":"Kato","sequence":"additional","affiliation":[]},{"given":"Takashi","family":"Okuda","sequence":"additional","affiliation":[]},{"given":"Yoshitaka","family":"Yamamoto","sequence":"additional","affiliation":[]},{"given":"Masahiro","family":"Fujita","sequence":"additional","affiliation":[]},{"given":"Jun","family":"Koyama","sequence":"additional","affiliation":[]},{"given":"Shunpei","family":"Yamazaki","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2198969"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757531"},{"key":"ref5","first-page":"188","article-title":"A 3bitlcell Nonvolatile Memory with Crystalline In-Ga-Zn-O TFT","author":"nagatsuka","year":"2013","journal-title":"Proc 5th IEEE Int Memory Workshop"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1002\/j.2168-0159.2012.tb05742.x"},{"key":"ref1","first-page":"224","article-title":"Cycling Endurance Optimization Scheme for 1 Mb STT-MRAM in 40nm Technology","author":"yu","year":"2013","journal-title":"ISSCC Dig Tech Papers"}],"event":{"name":"2015 IEEE International Solid- State Circuits Conference - (ISSCC)","start":{"date-parts":[[2015,2,22]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2015,2,26]]}},"container-title":["2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7054075\/7062838\/07063048.pdf?arnumber=7063048","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T23:27:29Z","timestamp":1490311649000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7063048\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,2]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/isscc.2015.7063048","relation":{},"subject":[],"published":{"date-parts":[[2015,2]]}}}