{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T15:52:45Z","timestamp":1780674765827,"version":"3.54.1"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,1]]},"DOI":"10.1109\/isscc.2016.7418030","type":"proceedings-article","created":{"date-parts":[[2016,3,25]],"date-time":"2016-03-25T16:32:21Z","timestamp":1458923541000},"page":"308-309","source":"Crossref","is-referenced-by-count":8,"title":["17.2 5.6Mb\/mm2 1R1W 8T SRAM arrays operating down to 560mV utilizing small-signal sensing with charge-shared bitline and asymmetric sense amplifier in 14nm FinFET CMOS technology"],"prefix":"10.1109","author":[{"given":"John","family":"Keane","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jaydeep","family":"Kulkarni","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kyung-Hoae","family":"Koo","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Satyanand","family":"Nalam","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zheng","family":"Guo","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Eric","family":"Karl","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Kevin","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref4","first-page":"126c","article-title":"Dual-VCC 8T-bitcell SRAM Array in 22nm Tri-Gate CMOS for Energy-Efficient Operation across Wide Dynamic Voltage Range","author":"kulkarni","year":"2013","journal-title":"IEEE Symp VLSI Circuits"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2013.6658451"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7063051"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2014.6757414"},{"key":"ref7","first-page":"266c","article-title":"A 0.094?m2 High Density and Aging Resilient 8T SRAM with 14nm FinFET Technology Featuring 560mV VMIN with Read and Write Assist","author":"koo","year":"2015","journal-title":"IEEE Symp VLSI Circuits"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.809516"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433818"}],"event":{"name":"2016 IEEE International Solid-State Circuits Conference (ISSCC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2016,1,31]]},"end":{"date-parts":[[2016,2,4]]}},"container-title":["2016 IEEE International Solid-State Circuits Conference (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7405163\/7417881\/7418030.pdf?arnumber=7418030","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,9,29]],"date-time":"2016-09-29T20:07:05Z","timestamp":1475179625000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7418030\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,1]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isscc.2016.7418030","relation":{},"subject":[],"published":{"date-parts":[[2016,1]]}}}