{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,28]],"date-time":"2025-08-28T12:19:32Z","timestamp":1756383572275},"reference-count":6,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,2]]},"DOI":"10.1109\/isscc.2017.7870441","type":"proceedings-article","created":{"date-parts":[[2017,3,7]],"date-time":"2017-03-07T14:34:02Z","timestamp":1488897242000},"page":"422-423","source":"Crossref","is-referenced-by-count":6,"title":["24.8 A 14nm fractional-N digital PLL with 0.14ps&lt;inf&gt;rms&lt;\/inf&gt; jitter and \u221278dBc fractional spur for cellular RFICs"],"prefix":"10.1109","author":[{"given":"Chih-Wei","family":"Yao","sequence":"first","affiliation":[]},{"given":"Wing Fai","family":"Loke","sequence":"additional","affiliation":[]},{"given":"Ronghua","family":"Ni","sequence":"additional","affiliation":[]},{"given":"Yongping","family":"Han","sequence":"additional","affiliation":[]},{"given":"Haoyang","family":"Li","sequence":"additional","affiliation":[]},{"given":"Kunal","family":"Godbole","sequence":"additional","affiliation":[]},{"given":"Yongrong","family":"Zuo","sequence":"additional","affiliation":[]},{"given":"Sangsoo","family":"Ko","sequence":"additional","affiliation":[]},{"given":"Nam-Seog","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Sangwook","family":"Han","sequence":"additional","affiliation":[]},{"given":"Ikkyun","family":"Jo","sequence":"additional","affiliation":[]},{"given":"Joonhee","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Juyoung","family":"Han","sequence":"additional","affiliation":[]},{"given":"Daehyeon","family":"Kwon","sequence":"additional","affiliation":[]},{"given":"Chulho","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Shinwoong","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Sang Won","family":"Son","sequence":"additional","affiliation":[]},{"given":"Thomas Byunghak","family":"Cho","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2314436"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417963"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523197"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2077370"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2014709"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2230543"}],"event":{"name":"2017 IEEE International Solid- State Circuits Conference - (ISSCC)","start":{"date-parts":[[2017,2,5]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2017,2,9]]}},"container-title":["2017 IEEE International Solid-State Circuits Conference (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7866667\/7870233\/07870441.pdf?arnumber=7870441","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,18]],"date-time":"2017-03-18T06:32:56Z","timestamp":1489818776000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7870441\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,2]]},"references-count":6,"URL":"https:\/\/doi.org\/10.1109\/isscc.2017.7870441","relation":{},"subject":[],"published":{"date-parts":[[2017,2]]}}}