{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,1]],"date-time":"2025-11-01T11:14:11Z","timestamp":1761995651000,"version":"build-2065373602"},"reference-count":7,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2017,2]]},"DOI":"10.1109\/isscc.2017.7870471","type":"proceedings-article","created":{"date-parts":[[2017,3,7]],"date-time":"2017-03-07T19:34:02Z","timestamp":1488915242000},"page":"482-483","source":"Crossref","is-referenced-by-count":13,"title":["29.1 A 64Gb\/s 1.4pJ\/b NRZ optical-receiver data-path in 14nm CMOS FinFET"],"prefix":"10.1109","author":[{"given":"Alessandro","family":"Cevrero","sequence":"first","affiliation":[]},{"given":"Ilter","family":"Ozkaya","sequence":"additional","affiliation":[]},{"given":"Pier Andrea","family":"Francese","sequence":"additional","affiliation":[]},{"given":"Christian","family":"Menolfi","sequence":"additional","affiliation":[]},{"given":"Thomas","family":"Morf","sequence":"additional","affiliation":[]},{"given":"Matthias","family":"Brandli","sequence":"additional","affiliation":[]},{"given":"Dan","family":"Kuchta","sequence":"additional","affiliation":[]},{"given":"Lukas","family":"Kull","sequence":"additional","affiliation":[]},{"given":"Jon","family":"Proesel","sequence":"additional","affiliation":[]},{"given":"Marcel","family":"Kossel","sequence":"additional","affiliation":[]},{"given":"Danny","family":"Luu","sequence":"additional","affiliation":[]},{"given":"Benjamin","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Fuad","family":"Doany","sequence":"additional","affiliation":[]},{"given":"Mounir","family":"Meghelli","sequence":"additional","affiliation":[]},{"given":"Yusuf","family":"Leblebici","sequence":"additional","affiliation":[]},{"given":"Thomas","family":"Toifl","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"118","article-title":"A 4× 25-to-28Gb\/s 4.9mW\/Gb\/s ?9.7dBm high sensitivity optical receiver based on 65nm CMOS for board to board interconnects","author":"takemoto","year":"2013","journal-title":"ISSCC"},{"key":"ref3","first-page":"400","article-title":"A 25 Gb\/s burst mode receiver for rapidly reconfigurable optical networks","author":"rylyakov","year":"2015","journal-title":"ISSCC"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/LPT.2014.2385671"},{"key":"ref5","first-page":"112","article-title":"A 56 Gb\/s receiver front end with a CTLE and 1-tap DFE in 20nm CMOS","author":"shibasaki","year":"2014","journal-title":"IEEE Symp VLSI Circuits"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2584643"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1364\/OFC.2011.OThP3"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ECTC.2005.1441271"}],"event":{"name":"2017 IEEE International Solid- State Circuits Conference - (ISSCC)","start":{"date-parts":[[2017,2,5]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2017,2,9]]}},"container-title":["2017 IEEE International Solid-State Circuits Conference (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7866667\/7870233\/07870471.pdf?arnumber=7870471","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,10,3]],"date-time":"2017-10-03T02:15:57Z","timestamp":1506996957000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7870471\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,2]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isscc.2017.7870471","relation":{},"subject":[],"published":{"date-parts":[[2017,2]]}}}