{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,28]],"date-time":"2026-02-28T17:41:58Z","timestamp":1772300518908,"version":"3.50.1"},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/isscc.2018.8310204","type":"proceedings-article","created":{"date-parts":[[2018,3,16]],"date-time":"2018-03-16T11:53:18Z","timestamp":1521201198000},"page":"102-104","source":"Crossref","is-referenced-by-count":42,"title":["A 112Gb\/s PAM-4 transmitter with 3-Tap FFE in 10nm CMOS"],"prefix":"10.1109","author":[{"given":"Jihwan","family":"Kim","sequence":"first","affiliation":[]},{"given":"Ajay","family":"Balankutty","sequence":"additional","affiliation":[]},{"given":"Rajeev","family":"Dokania","sequence":"additional","affiliation":[]},{"given":"Amr","family":"Elshazly","sequence":"additional","affiliation":[]},{"given":"Hyung Seok","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Sandipan","family":"Kundu","sequence":"additional","affiliation":[]},{"given":"Skyler","family":"Weaver","sequence":"additional","affiliation":[]},{"given":"Kai","family":"Yu","sequence":"additional","affiliation":[]},{"given":"Frank","family":"O'Mahony","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"68","article-title":"A 40-to-64Gb\/s NRZ transmitter with supply-regulated frontend in 16nm FinFET","author":"frans","year":"2016","journal-title":"ISSCC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417909"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2015.7062925"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2017.8268472"},{"key":"ref8","first-page":"458","article-title":"A 2. 6mW 370MHz-to-2. 5GHz open-loop quadrature clock generator","author":"kim","year":"2008","journal-title":"ISSCC"},{"key":"ref7","first-page":"763","article-title":"32-48Gb\/s serializing transmitter using multiphase serialization in 65nm CMOS technology","volume":"50","author":"hafez","year":"2015","journal-title":"IEEE JSSC"},{"key":"ref2","first-page":"118","article-title":"A 1. 8pJ\/b 56Gb\/s PAM-4 transmitter with fractionally spaced FFE in 14nm CMOS","author":"dickson","year":"2017","journal-title":"ISSCC"},{"key":"ref1","first-page":"116","article-title":"A 64Gb\/s PAM-4 transmitter with 4-tap FFE and 2. 26pJ\/b energy efficiency in 28nm CMOS FDSOl","author":"steffan","year":"2017","journal-title":"ISSCC"}],"event":{"name":"2018 IEEE International Solid-State Circuits Conference (ISSCC)","location":"San Francisco, CA","start":{"date-parts":[[2018,2,11]]},"end":{"date-parts":[[2018,2,15]]}},"container-title":["2018 IEEE International Solid - State Circuits Conference - (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8304413\/8310156\/08310204.pdf?arnumber=8310204","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,4,18]],"date-time":"2018-04-18T17:58:13Z","timestamp":1524074293000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8310204\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/isscc.2018.8310204","relation":{},"subject":[],"published":{"date-parts":[[2018,2]]}}}