{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:48:09Z","timestamp":1772725689204,"version":"3.50.1"},"reference-count":3,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2018,2]]},"DOI":"10.1109\/isscc.2018.8310257","type":"proceedings-article","created":{"date-parts":[[2018,3,16]],"date-time":"2018-03-16T15:53:18Z","timestamp":1521215598000},"page":"208-210","source":"Crossref","is-referenced-by-count":45,"title":["A 1.2V 64Gb 341GB\/S HBM2 stacked DRAM with spiral point-to-point TSV structure and improved bank group data control"],"prefix":"10.1109","author":[{"given":"Jin Hee","family":"Cho","sequence":"first","affiliation":[]},{"given":"Jihwan","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Woo Young","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Dong Uk","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Tae Kyun","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Heat Bit","family":"Park","sequence":"additional","affiliation":[]},{"given":"Chunseok","family":"Jeong","sequence":"additional","affiliation":[]},{"given":"Myeong-Jae","family":"Park","sequence":"additional","affiliation":[]},{"given":"Seung Geun","family":"Baek","sequence":"additional","affiliation":[]},{"given":"Seokwoo","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Byung Kuk","family":"Yoon","sequence":"additional","affiliation":[]},{"given":"Young Jae","family":"Choi","sequence":"additional","affiliation":[]},{"given":"Kyo Yun","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Daeyong","family":"Shim","sequence":"additional","affiliation":[]},{"given":"Jonghoon","family":"Oh","sequence":"additional","affiliation":[]},{"given":"Jinkook","family":"Kim","sequence":"additional","affiliation":[]},{"given":"Seok-Hee","family":"Lee","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref3","year":"2015","journal-title":"JEDEC Standard High Bandwidth Memory (HBM) DRAM Specification"},{"key":"ref2","article-title":"An Exact Measurement and Repair Circuit of TSV Connections for 128GB\/s High-Bandwidth Memory (HBM) Stacked DRAM","author":"lee","year":"0","journal-title":"IEEE Symp VLSI Circuits"},{"key":"ref1","first-page":"318","article-title":"A 1. 2V 64Gb 8-channel 256GB\/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface","author":"lee","year":"2016","journal-title":"ISSCC"}],"event":{"name":"2018 IEEE International Solid-State Circuits Conference (ISSCC)","location":"San Francisco, CA","start":{"date-parts":[[2018,2,11]]},"end":{"date-parts":[[2018,2,15]]}},"container-title":["2018 IEEE International Solid - State Circuits Conference - (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8304413\/8310156\/08310257.pdf?arnumber=8310257","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2018,4,11]],"date-time":"2018-04-11T21:39:59Z","timestamp":1523482799000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8310257\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2]]},"references-count":3,"URL":"https:\/\/doi.org\/10.1109\/isscc.2018.8310257","relation":{},"subject":[],"published":{"date-parts":[[2018,2]]}}}