{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,1]],"date-time":"2025-10-01T15:16:51Z","timestamp":1759331811274,"version":"3.28.0"},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2020,2,1]],"date-time":"2020-02-01T00:00:00Z","timestamp":1580515200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2020,2]]},"DOI":"10.1109\/isscc19947.2020.9063062","type":"proceedings-article","created":{"date-parts":[[2020,4,14]],"date-time":"2020-04-14T06:26:02Z","timestamp":1586845562000},"page":"482-484","source":"Crossref","is-referenced-by-count":13,"title":["31.3 A Compute-Adaptive Elastic Clock-Chain Technique with Dynamic Timing Enhancement for 2D PE-Array-Based Accelerators"],"prefix":"10.1109","author":[{"given":"Tianyu","family":"Jia","sequence":"first","affiliation":[]},{"given":"Yuhao","family":"Ju","sequence":"additional","affiliation":[]},{"given":"Jie","family":"Gu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","first-page":"318","article-title":"An Adaptive Clock Management Scheme Exploiting Instruction-Based Dynamic Timing Slack for a General-Purpose Graphics Processor Unit with Deeo Pipeline and Out-of-Order Execution","author":"jia","year":"2019","journal-title":"ISSCC"},{"key":"ref3","first-page":"444","article-title":"Adaptive Clocking in the POWER9™ Processor for Voltage Droop Protection","author":"floyd","year":"2017","journal-title":"ISSCC"},{"key":"ref6","first-page":"242","article-title":"A 28nm SoC with a 1.2GHz 568nJ\/Prediction Sparse Deep-Neural-Network Engine with >0.1 Timing Error Rate Tolerance for IoT Aonlications","author":"whatmough","year":"2017","journal-title":"ISSCC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870353"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310261"},{"key":"ref2","first-page":"8","article-title":"A 16 nm All-Digital Auto-Calibrating Adaptive Clock Distribution for Supply Voltage Droop Tolerance Across a Wide Operating Range","volume":"51","author":"bowman","year":"2016","journal-title":"IEEE JSSC"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417956"}],"event":{"name":"2020 IEEE International Solid- State Circuits Conference - (ISSCC)","start":{"date-parts":[[2020,2,16]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2020,2,20]]}},"container-title":["2020 IEEE International Solid- State Circuits Conference - (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9046640\/9062887\/09063062.pdf?arnumber=9063062","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,6,28]],"date-time":"2022-06-28T21:51:40Z","timestamp":1656453100000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9063062\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2020,2]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isscc19947.2020.9063062","relation":{},"subject":[],"published":{"date-parts":[[2020,2]]}}}