{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,28]],"date-time":"2026-03-28T16:43:10Z","timestamp":1774716190419,"version":"3.50.1"},"reference-count":5,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,2,19]],"date-time":"2023-02-19T00:00:00Z","timestamp":1676764800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,2,19]],"date-time":"2023-02-19T00:00:00Z","timestamp":1676764800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,2,19]]},"DOI":"10.1109\/isscc42615.2023.10067395","type":"proceedings-article","created":{"date-parts":[[2023,3,23]],"date-time":"2023-03-23T17:38:07Z","timestamp":1679593087000},"page":"160-162","source":"Crossref","is-referenced-by-count":27,"title":["9.3 NVLink-C2C: A Coherent Off Package Chip-to-Chip Interconnect with 40Gbps\/pin Single-ended Signaling"],"prefix":"10.1109","author":[{"given":"Ying","family":"Wei","sequence":"first","affiliation":[{"name":"Nvidia,Santa Clara,CA"}]},{"given":"Yi Chieh","family":"Huang","sequence":"additional","affiliation":[{"name":"Nvidia,Hsinchu,Taiwan"}]},{"given":"Haiming","family":"Tang","sequence":"additional","affiliation":[{"name":"Nvidia,Santa Clara,CA"}]},{"given":"Nithya","family":"Sankaran","sequence":"additional","affiliation":[{"name":"Nvidia,Santa Clara,CA"}]},{"given":"Ish","family":"Chadha","sequence":"additional","affiliation":[{"name":"Nvidia,Santa Clara,CA"}]},{"given":"Dai","family":"Dai","sequence":"additional","affiliation":[{"name":"Nvidia,Santa Clara,CA"}]},{"given":"Olakanmi","family":"Oluwole","sequence":"additional","affiliation":[{"name":"Nvidia,Santa Clara,CA"}]},{"given":"Vishnu","family":"Balan","sequence":"additional","affiliation":[{"name":"Nvidia,Santa Clara,CA"}]},{"given":"Edward","family":"Lee","sequence":"additional","affiliation":[{"name":"Nvidia,Santa Clara,CA"}]}],"member":"263","reference":[{"key":"ref1","first-page":"404","article-title":"A 0. 54pJ\/b 20Gb\/s Ground-Referenced Single-Ended Short-Haul Serial Link in 28nm CMOS for Advanced Packaging Applications.","author":"Poulton","year":"2013","journal-title":"ISSCC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2018.8310291"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42614.2022.9731636"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/isscc42613.2021.9365975"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/isscc.2016.7417967"}],"event":{"name":"2023 IEEE International Solid- State Circuits Conference (ISSCC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2023,2,19]]},"end":{"date-parts":[[2023,2,23]]}},"container-title":["2023 IEEE International Solid- State Circuits Conference (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10067248\/10067251\/10067395.pdf?arnumber=10067395","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,3]],"date-time":"2024-03-03T04:47:36Z","timestamp":1709441256000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10067395\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,2,19]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/isscc42615.2023.10067395","relation":{},"subject":[],"published":{"date-parts":[[2023,2,19]]}}}