{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T01:45:22Z","timestamp":1773193522772,"version":"3.50.1"},"reference-count":5,"publisher":"IEEE","license":[{"start":{"date-parts":[[2023,2,19]],"date-time":"2023-02-19T00:00:00Z","timestamp":1676764800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2023,2,19]],"date-time":"2023-02-19T00:00:00Z","timestamp":1676764800000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2023,2,19]]},"DOI":"10.1109\/isscc42615.2023.10067805","type":"proceedings-article","created":{"date-parts":[[2023,3,23]],"date-time":"2023-03-23T17:38:07Z","timestamp":1679593087000},"page":"1-3","source":"Crossref","is-referenced-by-count":28,"title":["A 1.1V 16Gb DDR5 DRAM with Probabilistic-Aggressor Tracking, Refresh-Management Functionality, Per-Row Hammer Tracking, a Multi-Step Precharge, and Core-Bias Modulation for Security and Reliability Enhancement"],"prefix":"10.1109","author":[{"given":"Woongrae","family":"Kim","sequence":"first","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Chulmoon","family":"Jung","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Seongnyuh","family":"Yoo","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Duckhwa","family":"Hong","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Jeongjin","family":"Hwang","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Jungmin","family":"Yoon","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Ohyong","family":"Jung","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Joonwoo","family":"Choi","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Sanga","family":"Hyun","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Mankeun","family":"Kang","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Sangho","family":"Lee","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Dohong","family":"Kim","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Sanghyun","family":"Ku","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Donhyun","family":"Choi","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Nogeun","family":"Joo","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Sangwoo","family":"Yoon","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Junseok","family":"Noh","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Byeongyong","family":"Go","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Cheolhoe","family":"Kim","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Sunil","family":"Hwang","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Mihyun","family":"Hwang","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Seol-Min","family":"Yi","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Hyungmin","family":"Kim","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Sanghyuk","family":"Heo","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Yeonsu","family":"Jang","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Kyoungchul","family":"Jang","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Shinho","family":"Chu","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Yoonna","family":"Oh","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Kwidong","family":"Kim","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Junghyun","family":"Kim","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Soohwan","family":"Kim","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Jeongtae","family":"Hwang","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Sangil","family":"Park","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Junphyo","family":"Lee","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Inchul","family":"Jeong","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Joohwan","family":"Cho","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]},{"given":"Jonghwan","family":"Kim","sequence":"additional","affiliation":[{"name":"SK hynix Semiconductor,lcheon,Korea"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2018.8310256"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/isca45697.2020.00059"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/SP46214.2022.9833664"},{"key":"ref4","first-page":"44","article-title":"A 1.2 V 30nm 1.6 Gb\/s\/pin 4Gb LPDDR3 SDRAM with input skew calibration and enhanced control scheme","author":"Bae","year":"2012","journal-title":"ISSCC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SP46214.2022.9833772"}],"event":{"name":"2023 IEEE International Solid- State Circuits Conference (ISSCC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2023,2,19]]},"end":{"date-parts":[[2023,2,23]]}},"container-title":["2023 IEEE International Solid- State Circuits Conference (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10067248\/10067251\/10067805.pdf?arnumber=10067805","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,2,13]],"date-time":"2024-02-13T13:56:59Z","timestamp":1707832619000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10067805\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2023,2,19]]},"references-count":5,"URL":"https:\/\/doi.org\/10.1109\/isscc42615.2023.10067805","relation":{},"subject":[],"published":{"date-parts":[[2023,2,19]]}}}