{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,30]],"date-time":"2025-12-30T08:58:03Z","timestamp":1767085083003},"reference-count":7,"publisher":"IEEE","license":[{"start":{"date-parts":[[2024,2,18]],"date-time":"2024-02-18T00:00:00Z","timestamp":1708214400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2024,2,18]],"date-time":"2024-02-18T00:00:00Z","timestamp":1708214400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2024,2,18]]},"DOI":"10.1109\/isscc49657.2024.10454280","type":"proceedings-article","created":{"date-parts":[[2024,3,13]],"date-time":"2024-03-13T18:55:39Z","timestamp":1710356139000},"page":"304-306","source":"Crossref","is-referenced-by-count":6,"title":["16.5 A Synthesizable Design-Agnostic Timing Fault Injection Monitor Covering 2MHz to 1.26GHz Clocks in 65nm CMOS"],"prefix":"10.1109","author":[{"given":"Yan","family":"He","sequence":"first","affiliation":[{"name":"Rice University,Houston,TX"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kaiyuan","family":"Yang","sequence":"additional","affiliation":[{"name":"Rice University,Houston,TX"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"article-title":"Investigation of timing constraints violation as a fault injection means","volume-title":"Conf. on Design of Circuits and Integrated Systems","author":"Zussa","key":"ref1"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/FDTC.2012.15"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISEMC.2018.8393882"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067715"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/VLSITechnologyandCir46769.2022.9830157"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3035373"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2003.1253179"}],"event":{"name":"2024 IEEE International Solid-State Circuits Conference (ISSCC)","start":{"date-parts":[[2024,2,18]]},"location":"San Francisco, CA, USA","end":{"date-parts":[[2024,2,22]]}},"container-title":["2024 IEEE International Solid-State Circuits Conference (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10454133\/10454267\/10454280.pdf?arnumber=10454280","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,3,26]],"date-time":"2024-03-26T12:26:25Z","timestamp":1711455985000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10454280\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,2,18]]},"references-count":7,"URL":"https:\/\/doi.org\/10.1109\/isscc49657.2024.10454280","relation":{},"subject":[],"published":{"date-parts":[[2024,2,18]]}}}