{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,10]],"date-time":"2026-06-10T16:14:39Z","timestamp":1781108079567,"version":"3.54.1"},"reference-count":18,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,2,16]],"date-time":"2025-02-16T00:00:00Z","timestamp":1739664000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,2,16]],"date-time":"2025-02-16T00:00:00Z","timestamp":1739664000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,2,16]]},"DOI":"10.1109\/isscc49661.2025.10904743","type":"proceedings-article","created":{"date-parts":[[2025,3,6]],"date-time":"2025-03-06T18:33:12Z","timestamp":1741285992000},"page":"146-148","source":"Crossref","is-referenced-by-count":1,"title":["7.6 A 2.06pJ\/b 106.25Gb\/s PAM-4 Receiver with 3-Tap FFE and 1-Tap Speculative DFE in 28nm CMOS"],"prefix":"10.1109","author":[{"given":"Yen-Po","family":"Lin","sequence":"first","affiliation":[{"name":"National Tsing Hua University,Hsinchu,Taiwan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Yun-Cheng","family":"Jao","sequence":"additional","affiliation":[{"name":"National Tsing Hua University,Hsinchu,Taiwan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Wu-Hung","family":"Hsieh","sequence":"additional","affiliation":[{"name":"National Tsing Hua University,Hsinchu,Taiwan"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Pen-Jui","family":"Peng","sequence":"additional","affiliation":[{"name":"National Tsing Hua University,Hsinchu,Taiwan"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9063081"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC19947.2020.9062925"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9366030"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731650"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067613"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2018.8502436"},{"key":"ref7","first-page":"112","article-title":"A 100Gb\/s 1.1 pJ\/b PAM-4 RX with Dual-Mode 1-Tap PAM-4 \/ 3-Tap NRZ Speculative DFE in 14nm CMOS FinFET","volume-title":"ISSCC","author":"Cevrero","year":"2019"},{"key":"ref8","first-page":"104","article-title":"A 112Gb\/S 2.6pJ\/b 8-Tap FFE PAM-4 SSTTX in 14nm CMOS","volume-title":"ISSCC","author":"Menolfi","year":"2018"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731591"},{"key":"ref10","first-page":"60","article-title":"A 25Gb\/s Multi-Standard Serial Link Transceiver for 50dB-loss Copper Cable in 28nm CMOS","volume-title":"ISSCC","author":"Norimatsu","year":"2016"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2014.6858400"},{"key":"ref12","first-page":"122","article-title":"A 56Gb\/s 7.7mW\/Gb\/s PAM-4 Wireline Transceiver in 1 Onm FinFET Using MM-CDR-Based ADC Timing Skew Control and Low-Power DSP with Approximate Multiplier","volume-title":"ISSCC","author":"Yoo","year":"2020"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365800"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2016.7417908"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870471"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365752"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42613.2021.9365975"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731636"}],"event":{"name":"2025 IEEE International Solid-State Circuits Conference (ISSCC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2025,2,16]]},"end":{"date-parts":[[2025,2,20]]}},"container-title":["2025 IEEE International Solid-State Circuits Conference (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10904417\/10904496\/10904743.pdf?arnumber=10904743","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,7]],"date-time":"2025-03-07T06:34:05Z","timestamp":1741329245000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10904743\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,2,16]]},"references-count":18,"URL":"https:\/\/doi.org\/10.1109\/isscc49661.2025.10904743","relation":{},"subject":[],"published":{"date-parts":[[2025,2,16]]}}}