{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,4]],"date-time":"2026-07-04T16:59:01Z","timestamp":1783184341982,"version":"3.54.6"},"reference-count":26,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,2,16]],"date-time":"2025-02-16T00:00:00Z","timestamp":1739664000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,2,16]],"date-time":"2025-02-16T00:00:00Z","timestamp":1739664000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National R&D Program through the NRF","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,2,16]]},"DOI":"10.1109\/isscc49661.2025.10904806","type":"proceedings-article","created":{"date-parts":[[2025,3,6]],"date-time":"2025-03-06T18:33:12Z","timestamp":1741285992000},"page":"01-03","source":"Crossref","is-referenced-by-count":9,"title":["8.5 A Command-Aware Hybrid LDO for Advanced HBM Interfaces with 150\u03bcA Quiescent Current and 20pF On-Chip Capacitor Achieving Sub-10mV Voltage Droop in 400ps Settling Time"],"prefix":"10.1109","author":[{"given":"Jaeho","family":"Kim","sequence":"first","affiliation":[{"name":"Seoul National University,Seoul,Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Myeongho","family":"Han","sequence":"additional","affiliation":[{"name":"Seoul National University,Seoul,Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jooeun","family":"Bang","sequence":"additional","affiliation":[{"name":"Seoul National University,Seoul,Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Younghyun","family":"Lim","sequence":"additional","affiliation":[{"name":"Kyung Hee University,Yongin,Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Jaehyouk","family":"Choi","sequence":"additional","affiliation":[{"name":"Seoul National University,Seoul,Korea"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"JESD238A: JEDEC Standard High Bandwidth Memory (HBM3) DRAM Specification","year":"2023"},{"key":"ref2","article-title":"A 4ns Settting Time FVF-Based Fast LDO Using Bandwidth Extension Techniques for HBM3","author":"Jung","year":"2023","journal-title":"IEEE ASSCC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454478"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2020.3024595"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2019.2904622"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2023.3292397"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2019.8662298"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2017.7870399"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2017.7993670"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2021.3103611"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2740269"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2018.8502295"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2017.2709311"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2018.2870558"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2015.7338389"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/vlsic.2018.8502272"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2023.3321052"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/jssc.2019.2961854"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3128815"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2021.3055742"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2023.3347254"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2019.2919665"},{"key":"ref23","article-title":"A 0.5\u20131-V Time-Voltage Hybrid Domain Dual-Loop Analog LDO With Wide-Bandwidth High PSR in 28 nm","author":"Jang","year":"2024","journal-title":"IEEE JSSC, early access"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/4.962289"},{"key":"ref25","first-page":"520","article-title":"A 5mA 0.6\u03bcm CMOS Miller-Compensated LDO Regulator with \u221227dB Worst-Case Power-Supply Rejection Using 60pF of On-Chip Capacitance","author":"Gupta","year":"2007","journal-title":"ISSCC"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2300847"}],"event":{"name":"2025 IEEE International Solid-State Circuits Conference (ISSCC)","location":"San Francisco, CA, USA","start":{"date-parts":[[2025,2,16]]},"end":{"date-parts":[[2025,2,20]]}},"container-title":["2025 IEEE International Solid-State Circuits Conference (ISSCC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/10904417\/10904496\/10904806.pdf?arnumber=10904806","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,5,9]],"date-time":"2025-05-09T17:52:47Z","timestamp":1746813167000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/10904806\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,2,16]]},"references-count":26,"URL":"https:\/\/doi.org\/10.1109\/isscc49661.2025.10904806","relation":{},"subject":[],"published":{"date-parts":[[2025,2,16]]}}}