{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,23]],"date-time":"2024-10-23T01:41:54Z","timestamp":1729647714930,"version":"3.28.0"},"reference-count":9,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2011,10]]},"DOI":"10.1109\/issoc.2011.6089685","type":"proceedings-article","created":{"date-parts":[[2011,12,6]],"date-time":"2011-12-06T21:01:09Z","timestamp":1323205269000},"page":"29-33","source":"Crossref","is-referenced-by-count":2,"title":["Customizable Datapath Integrated Lock Unit"],"prefix":"10.1109","author":[{"given":"Pekka","family":"Jaaskelainen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Erno","family":"Salminen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Otto","family":"Esko","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jarmo","family":"Takala","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"396","article-title":"Adaptive backoff synchronization techniques","author":"agarwal","year":"0","journal-title":"ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture"},{"key":"ref3","first-page":"6","article-title":"The performance of spin lock alternatives for shared-memory multiprocessors","author":"anderson","year":"0","journal-title":"Parallel and Distributed Systems IEEE Transactions on"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.884147"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/SUPERC.1990.130019"},{"key":"ref8","first-page":"1","article-title":"The 48-core sec processor: the programmer's view","author":"mattson","year":"0","journal-title":"Proceedings of the 2010 ACM\/IEEE International Conference for High Performance Computing Networking Storage and Analysis ser SC'10"},{"key":"ref7","first-page":"1257","article-title":"Low-cost and energy-efficient distributed synchronization for embedded multiprocessors","volume":"18","author":"yu","year":"0","journal-title":"Very Large Scale Integration (VLSI) Systems IEEE Transactions on"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"249","DOI":"10.1023\/A:1011168003859","article-title":"The architectural and operating system implications on the performance of synchronization on ccNUMA multiprocessors","volume":"29","author":"nikolopoulos","year":"0","journal-title":"Int J Parallel Program"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/SAMOS.2011.6045448"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/103727.103729"}],"event":{"name":"2011 International Symposium on System-on-Chip - SOC","start":{"date-parts":[[2011,10,31]]},"location":"Tampere, Finland","end":{"date-parts":[[2011,11,2]]}},"container-title":["2011 International Symposium on System on Chip (SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6085645\/6089208\/06089685.pdf?arnumber=6089685","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,20]],"date-time":"2017-06-20T10:53:20Z","timestamp":1497956000000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6089685\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,10]]},"references-count":9,"URL":"https:\/\/doi.org\/10.1109\/issoc.2011.6089685","relation":{},"subject":[],"published":{"date-parts":[[2011,10]]}}}