{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T16:10:43Z","timestamp":1725466243701},"reference-count":19,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2012,10]]},"DOI":"10.1109\/issoc.2012.6376354","type":"proceedings-article","created":{"date-parts":[[2012,12,18]],"date-time":"2012-12-18T13:46:48Z","timestamp":1355838408000},"page":"1-6","source":"Crossref","is-referenced-by-count":1,"title":["An automated framework for the simulation of mapping solutions on heterogeneous MPSoCs"],"prefix":"10.1109","author":[{"given":"Antonio","family":"Miele","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Christian","family":"Pilato","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Donatella","family":"Sciuto","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"19","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.187"},{"journal-title":"ReSP Web Site","year":"0","author":"di milano","key":"17"},{"year":"0","key":"18"},{"journal-title":"Gem5 Simulator System","year":"0","key":"15"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1145\/581199.581224"},{"journal-title":"GAUT High-Level Synthesis Tool from C to RTL","year":"0","key":"13"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/SBAC-PAD.2004.8"},{"journal-title":"Panda Web Site","year":"0","author":"di milano","key":"11"},{"journal-title":"SoCLib","year":"0","key":"12"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.16"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/54.970421"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923415"},{"journal-title":"Accelera Systems Initiative","year":"0","key":"10"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2030268"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2006.244004"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2005.21"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2048354"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2003.1253667"},{"journal-title":"Synopsys Platform Architect","year":"0","key":"8"}],"event":{"name":"2012 International Symposium on System-on-Chip - SOC","start":{"date-parts":[[2012,10,10]]},"location":"Tampere, Finland","end":{"date-parts":[[2012,10,12]]}},"container-title":["2012 International Symposium on System on Chip (SoC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/6362324\/6376346\/06376354.pdf?arnumber=6376354","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,21]],"date-time":"2017-03-21T21:15:34Z","timestamp":1490130934000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6376354\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10]]},"references-count":19,"URL":"https:\/\/doi.org\/10.1109\/issoc.2012.6376354","relation":{},"subject":[],"published":{"date-parts":[[2012,10]]}}}