{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,5,23]],"date-time":"2025-05-23T04:46:55Z","timestamp":1747975615506},"reference-count":8,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2014,7]]},"DOI":"10.1109\/isvdat.2014.6881070","type":"proceedings-article","created":{"date-parts":[[2014,8,22]],"date-time":"2014-08-22T12:38:16Z","timestamp":1408711096000},"page":"1-6","source":"Crossref","is-referenced-by-count":8,"title":["Hardware accelerator for real-time image resizing"],"prefix":"10.1109","author":[{"given":"Pranav Narayan","family":"Gour","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sujay","family":"Narumanchi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sumeet","family":"Saurav","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Sanjay","family":"Singh","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/42.816070"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/1099396.1099400"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/34.868681"},{"key":"7","first-page":"381","article-title":"Real-Time FPGA architecture of extended linear convolution for digital image scaling","author":"lin","year":"2008","journal-title":"Proc IEEE Int Conf Field-Programmable Technol"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSVT.2003.813431"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1109\/TASSP.1978.1163154"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/TMI.1983.4307610"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1109\/ISIP.2010.82"}],"event":{"name":"2014 18th International Symposium on VLSI Design and Test (VDAT)","start":{"date-parts":[[2014,7,16]]},"location":"Coimbatore, India","end":{"date-parts":[[2014,7,18]]}},"container-title":["18th International Symposium on VLSI Design and Test"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6873898\/6881034\/06881070.pdf?arnumber=6881070","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,23]],"date-time":"2017-03-23T15:59:53Z","timestamp":1490284793000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6881070\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,7]]},"references-count":8,"URL":"https:\/\/doi.org\/10.1109\/isvdat.2014.6881070","relation":{},"subject":[],"published":{"date-parts":[[2014,7]]}}}