{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,12]],"date-time":"2025-12-12T13:27:12Z","timestamp":1765546032332,"version":"3.28.0"},"reference-count":10,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2015,6]]},"DOI":"10.1109\/isvdat.2015.7208050","type":"proceedings-article","created":{"date-parts":[[2015,8,20]],"date-time":"2015-08-20T17:53:11Z","timestamp":1440093191000},"page":"1-6","source":"Crossref","is-referenced-by-count":3,"title":["CORDIC on a configurable serial architecture for biomedical signal processing applications"],"prefix":"10.1109","author":[{"given":"Nupur","family":"Jain","sequence":"first","affiliation":[]},{"given":"Biswajit","family":"Mishra","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/BioCAS.2014.6981648"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TBME.1985.325532"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2011.6026458"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/IIC.2015.7150788"},{"key":"ref5","first-page":"1","article-title":"Subthreshold FIR Filter Architecture for Ultra Low Power Applications","author":"mishra","year":"2008","journal-title":"PATMOS ‘08 Proc of the Int W'shop on Power & Timing Modeling Optimization & Simulation"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"63","DOI":"10.1023\/B:VLSI.0000028534.35761.a8","article-title":"A Multiplierless 2-d Convolver Chip for Realtime Image Processing","volume":"38","author":"sunwoo","year":"0","journal-title":"Journal of VLSI Signal Processing Systems for Signal Image and Video Technology"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1478786.1478840"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2144450"},{"key":"ref9","first-page":"329","article-title":"An Efficient 2-D Convolver Chip for Real-time Image Processing","author":"eun","year":"1998","journal-title":"Proc Asia and South Pacific Design Automation Conf"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/1457838.1457886"}],"event":{"name":"2015 19th International Symposium on VLSI Design and Test (VDAT)","start":{"date-parts":[[2015,6,26]]},"location":"Ahmedabad, India","end":{"date-parts":[[2015,6,29]]}},"container-title":["2015 19th International Symposium on VLSI Design and Test"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/7166536\/7208044\/07208050.pdf?arnumber=7208050","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,6,23]],"date-time":"2017-06-23T14:01:44Z","timestamp":1498226504000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7208050\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,6]]},"references-count":10,"URL":"https:\/\/doi.org\/10.1109\/isvdat.2015.7208050","relation":{},"subject":[],"published":{"date-parts":[[2015,6]]}}}