{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,10,30]],"date-time":"2024-10-30T08:27:42Z","timestamp":1730276862444,"version":"3.28.0"},"reference-count":23,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2016,5]]},"DOI":"10.1109\/isvdat.2016.8064867","type":"proceedings-article","created":{"date-parts":[[2017,10,12]],"date-time":"2017-10-12T20:40:08Z","timestamp":1507840808000},"page":"1-6","source":"Crossref","is-referenced-by-count":3,"title":["Approximate conditional carry adder for error tolerant applications"],"prefix":"10.1109","author":[{"given":"Avishek Sinha","family":"Roy","sequence":"first","affiliation":[]},{"given":"N","family":"Prasad","sequence":"additional","affiliation":[]},{"given":"Anindya Sundar","family":"Dhar","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/NANOARCH.2015.7180603"},{"key":"ref11","first-page":"1","article-title":"Approximate adder synthesis for area- and energy-efficient fir filters in cmos vlsi","author":"bandeira soares","year":"2015","journal-title":"New Circuits and Systems Conference (NEWCAS) 2015 IEEE 13th International"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ISVDAT.2015.7208150"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/IC4.2015.7375577"},{"key":"ref14","first-page":"1449","article-title":"A new approximate adder with low relative error and correct sign calculation","author":"hu","year":"2015","journal-title":"Design Automation Test in Europe Conference Exhibition (DATE) 2015"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/SECON.2015.7132970"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.146"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2317180"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2014.7001399"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1960.5219822"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2217962"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228509"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/NANO.2013.6720793"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2011.5993638"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691108"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691096"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2011.5993675"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.1274006"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/NAECON.2014.7045768"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ASIC.1998.722817"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2011.51"},{"key":"ref21","first-page":"975","article-title":"Improved 32-bit conditional sum adder for low-power high-speed applications","volume":"22","author":"cheng","year":"2006","journal-title":"J Inform Sci Eng"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1166\/jolpe.2011.1157"}],"event":{"name":"2016 20th International Symposium on VLSI Design and Test (VDAT)","start":{"date-parts":[[2016,5,24]]},"location":"Guwahati, India","end":{"date-parts":[[2016,5,27]]}},"container-title":["2016 20th International Symposium on VLSI Design and Test (VDAT)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8059694\/8064831\/08064867.pdf?arnumber=8064867","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,11,30]],"date-time":"2017-11-30T20:49:49Z","timestamp":1512074989000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8064867\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5]]},"references-count":23,"URL":"https:\/\/doi.org\/10.1109\/isvdat.2016.8064867","relation":{},"subject":[],"published":{"date-parts":[[2016,5]]}}}