{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,24]],"date-time":"2025-03-24T06:39:59Z","timestamp":1742798399193},"reference-count":12,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/isvlsi.2002.1016880","type":"proceedings-article","created":{"date-parts":[[2003,6,25]],"date-time":"2003-06-25T22:04:13Z","timestamp":1056578653000},"page":"89-94","source":"Crossref","is-referenced-by-count":10,"title":["Noise tolerant low power dynamic TSPCL D flip-flops"],"prefix":"10.1109","author":[{"given":"M.","family":"Elgamel","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T.","family":"Darwish","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"M.","family":"Bayoumi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/4.16303"},{"year":"2000","author":"heo","article-title":"A Low-power 32-bit Datapath Design","key":"ref3"},{"year":"0","key":"ref10"},{"doi-asserted-by":"publisher","key":"ref6","DOI":"10.1109\/ICCAD.1996.569906"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1109\/PROC.1985.13301"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1109\/JSSC.1983.1051937"},{"key":"ref12","first-page":"549","article-title":"Noise-tolerant dynamic circuit design","author":"wang","year":"1999","journal-title":"Proc of IEEE Intl Symp on Circuits and Systems"},{"key":"ref8","article-title":"Reliable low-power design in the presence of deep submicron noise","author":"shanbhag","year":"0","journal-title":"Tutorial paper in Intl’ Symposium on Low-Power Electronics and Design '00"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/4.293110"},{"year":"1993","author":"weste","journal-title":"Principles of CMOS VLSI Design A Systems Perspective","key":"ref2"},{"doi-asserted-by":"publisher","key":"ref9","DOI":"10.1109\/4.902768"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1109\/92.820758"}],"event":{"acronym":"ISVLSI-02","name":"IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002","location":"Pittsburgh, PA, USA"},"container-title":["Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/7933\/21881\/01016880.pdf?arnumber=1016880","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,10]],"date-time":"2017-03-10T23:36:40Z","timestamp":1489189000000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1016880\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":12,"URL":"https:\/\/doi.org\/10.1109\/isvlsi.2002.1016880","relation":{},"subject":[]}}