{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,9,4]],"date-time":"2024-09-04T14:34:08Z","timestamp":1725460448867},"reference-count":3,"publisher":"IEEE Comput. Soc","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"DOI":"10.1109\/isvlsi.2003.1183471","type":"proceedings-article","created":{"date-parts":[[2003,10,1]],"date-time":"2003-10-01T14:55:21Z","timestamp":1065020121000},"page":"213-214","source":"Crossref","is-referenced-by-count":1,"title":["Systolic array implementation of block based Hopfield neural network for pattern association"],"prefix":"10.1109","author":[{"family":"Ming-Jung Seow","sequence":"first","affiliation":[]},{"family":"Hau Ngo","sequence":"additional","affiliation":[]},{"given":"V.","family":"Asari","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1073\/pnas.79.8.2554"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/AIPR.2001.991221"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1016\/0141-9331(94)90096-5"}],"event":{"name":"IEEE Computer Society Annual Symposium on VLSI. New Trends and Technologies for VLSI Systems Design. ISVLSI 2003","acronym":"ISVLSI-03","location":"Tampa, FL, USA"},"container-title":["IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings."],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/8431\/26555\/01183471.pdf?arnumber=1183471","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,13]],"date-time":"2017-03-13T23:33:56Z","timestamp":1489448036000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1183471\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[null]]},"references-count":3,"URL":"https:\/\/doi.org\/10.1109\/isvlsi.2003.1183471","relation":{},"subject":[]}}