{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:36:30Z","timestamp":1773246990471,"version":"3.50.1"},"reference-count":17,"publisher":"IEEE","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2013,8]]},"DOI":"10.1109\/isvlsi.2013.6654627","type":"proceedings-article","created":{"date-parts":[[2013,11,11]],"date-time":"2013-11-11T17:23:30Z","timestamp":1384190610000},"page":"84-89","source":"Crossref","is-referenced-by-count":4,"title":["Simultaneous gate sizing and V<inf>th<\/inf> assignment using Lagrangian Relaxation and delay sensitivities"],"prefix":"10.1109","author":[{"given":"Guilherme","family":"Flach","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tiago","family":"Reimann","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Gracieli","family":"Posser","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marcelo","family":"Johann","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ricardo","family":"Reis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/SFCS.1994.365742"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2013.6572398"},{"key":"16","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176440"},{"key":"13","doi-asserted-by":"publisher","DOI":"10.1145\/2160916.2160950"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763293"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105409"},{"key":"12","doi-asserted-by":"publisher","DOI":"10.1109\/43.771182"},{"key":"3","article-title":"Leakage power at 90nm and below","author":"pangrle","year":"2005","journal-title":"EE Times-Asia Online"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429427"},{"key":"1","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429428"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1145\/1514932.1514940"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/43.248073"},{"key":"6","doi-asserted-by":"publisher","DOI":"10.1145\/1366110.1366176"},{"key":"5","doi-asserted-by":"publisher","DOI":"10.1145\/1077603.1077642"},{"key":"4","first-page":"468","article-title":"NP-hard discrete gate sizing problems","author":"strongly","year":"1993","journal-title":"ICC 1993"},{"key":"9","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-012-9943-3"},{"key":"8","doi-asserted-by":"publisher","DOI":"10.1145\/1120725.1120881"}],"event":{"name":"2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","location":"Natal, Brazil","start":{"date-parts":[[2013,8,5]]},"end":{"date-parts":[[2013,8,7]]}},"container-title":["2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/6646390\/6654605\/06654627.pdf?arnumber=6654627","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2017,3,22]],"date-time":"2017-03-22T22:38:45Z","timestamp":1490222325000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6654627\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,8]]},"references-count":17,"URL":"https:\/\/doi.org\/10.1109\/isvlsi.2013.6654627","relation":{},"subject":[],"published":{"date-parts":[[2013,8]]}}}