{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,28]],"date-time":"2025-08-28T05:10:22Z","timestamp":1756357822514,"version":"3.44.0"},"reference-count":15,"publisher":"IEEE","license":[{"start":{"date-parts":[[2025,7,6]],"date-time":"2025-07-06T00:00:00Z","timestamp":1751760000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2025,7,6]],"date-time":"2025-07-06T00:00:00Z","timestamp":1751760000000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2025,7,6]]},"DOI":"10.1109\/isvlsi65124.2025.11130280","type":"proceedings-article","created":{"date-parts":[[2025,8,27]],"date-time":"2025-08-27T18:20:15Z","timestamp":1756318815000},"page":"1-6","source":"Crossref","is-referenced-by-count":0,"title":["A Low-Complexity XOR-Based BCH Decoder for PAM4 Modulation Systems"],"prefix":"10.1109","author":[{"given":"Changfu","family":"He","sequence":"first","affiliation":[{"name":"Nanjing University,School of Electronic Science and Engineering,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xinle","family":"Jia","sequence":"additional","affiliation":[{"name":"Nanjing University,School of Electronic Science and Engineering,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yuxing","family":"Chen","sequence":"additional","affiliation":[{"name":"Nanjing University,School of Electronic Science and Engineering,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wenli","family":"Xu","sequence":"additional","affiliation":[{"name":"Sun Yat-sen University,School of Integrated Circuits,Shenzhen,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Suwen","family":"Song","sequence":"additional","affiliation":[{"name":"Sun Yat-sen University,School of Integrated Circuits,Shenzhen,China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Zhongfeng","family":"Wang","sequence":"additional","affiliation":[{"name":"Nanjing University,School of Electronic Science and Engineering,Nanjing,China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1972.1054746"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/18.412683"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.2019.2896110"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2022.3203251"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2022.3153605"},{"journal-title":"IEEE Std 802.3dj","article-title":"IEEE standard for ethernet amendment: Media access control parameters for 1.6 Tb\/s and physical layers and management parameters for 200 Gb\/s, 400 Gb\/s, 800 Gb\/s, and 1.6 Gb\/s operation","year":"2023","key":"ref6"},{"key":"ref7","article-title":"Concatenated FEC baseline proposal for 200 Gb\/s per lane IM-DD optical PMD","author":"Farhood","year":"2023","journal-title":"IEEE Std 802.3dj"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI54635.2022.00049"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/APCCAS55924.2022.10090385"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI61997.2024.00048"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511803253"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICC.1995.524253"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1142\/9407"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1960.1057586"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCT.2018.8599928"}],"event":{"name":"2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)","start":{"date-parts":[[2025,7,6]]},"location":"Kalamata, Greece","end":{"date-parts":[[2025,7,9]]}},"container-title":["2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx8\/11129697\/11130193\/11130280.pdf?arnumber=11130280","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,28]],"date-time":"2025-08-28T04:32:15Z","timestamp":1756355535000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/11130280\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,7,6]]},"references-count":15,"URL":"https:\/\/doi.org\/10.1109\/isvlsi65124.2025.11130280","relation":{},"subject":[],"published":{"date-parts":[[2025,7,6]]}}}