{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,28]],"date-time":"2026-07-28T02:18:00Z","timestamp":1785205080690,"version":"3.55.0"},"reference-count":48,"publisher":"IEEE","license":[{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2019,11,1]],"date-time":"2019-11-01T00:00:00Z","timestamp":1572566400000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":[],"published-print":{"date-parts":[[2019,11]]},"DOI":"10.1109\/itc44170.2019.9000175","type":"proceedings-article","created":{"date-parts":[[2020,2,18]],"date-time":"2020-02-18T06:14:42Z","timestamp":1582006482000},"page":"1-10","source":"Crossref","is-referenced-by-count":2,"title":["Reliability Modeling and Mitigation for Embedded Memories"],"prefix":"10.1109","author":[{"given":"Innocent Okwudili","family":"Agbo","sequence":"first","affiliation":[{"name":"Delft University of Technology, Faculty of Electrical Engineering, Mathematics and Computer Science,Mekelweg 4, Delft,The Netherlands,2628 CD"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mottaqiallah","family":"Taouil","sequence":"additional","affiliation":[{"name":"Delft University of Technology, Faculty of Electrical Engineering, Mathematics and Computer Science,Mekelweg 4, Delft,The Netherlands,2628 CD"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Said","family":"Hamdioui","sequence":"additional","affiliation":[{"name":"Delft University of Technology, Faculty of Electrical Engineering, Mathematics and Computer Science,Mekelweg 4, Delft,The Netherlands,2628 CD"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","first-page":"3a.4.1","article-title":"IEEE (IRPS)","author":"weckx","year":"2013","journal-title":"Defect-based methodology for workload-dependent circuit lifetime projections - Application to SRAM"},{"key":"ref38","first-page":"27.4.1","article-title":"International Electron Devices Meeting","author":"grasser","year":"0","journal-title":"Analytic modeling of the bias temperature instability using capture\/emission time maps"},{"key":"ref33","first-page":"1433","article-title":"IEEE Journal of Solid-State Circuits","author":"pelgrom","year":"1989","journal-title":"Matching properties of MOS Transistors"},{"key":"ref32","first-page":"858","article-title":"(DATE)","author":"kraak","year":"2017","journal-title":"Mitigation of sense amplifier degradation using input switching"},{"key":"ref31","first-page":"1","article-title":"2016 21th IEEE ETS","author":"agbo","year":"2016","journal-title":"Read path degradation analysis in SRAM"},{"key":"ref30","first-page":"158","article-title":"Microelectronics Reliability Journal","volume":"87","author":"agbo","year":"2018","journal-title":"Impact and mitigation of SRAM read path aging"},{"key":"ref37","first-page":"26","article-title":"IEEE International Reliability Physics Symposium","author":"kaczer","year":"0","journal-title":"Origin of NBTI variability in deeply scaled pFETs"},{"key":"ref36","first-page":"348","article-title":"2012 IEEE 15th DDECS","volume":"18","author":"khan","year":"2012","journal-title":"BTI impact on logical gates in nano-scale CMOS technology"},{"key":"ref35","first-page":"386","article-title":"IEEE Transactions on Electron Devices","volume":"18","author":"wang","year":"1971","journal-title":"Threshold voltage variations with temperature in MOS transistors"},{"key":"ref34","first-page":"5","article-title":"IEEE Journal on Emerging and Selected Topics in Circuits and Systems","volume":"1","author":"sapatnekar","year":"2011","journal-title":"Overcoming Variations in Nanometer-Scale Technologies"},{"key":"ref10","first-page":"xt.3.1","article-title":"2011 IRPS","author":"kaczer","year":"2011","journal-title":"Atomistic approach to variability of bias-temperature instability in circuit simulations"},{"key":"ref40","first-page":"1","article-title":"2011 IEEE International Conference on IC Design Technology","author":"rodopoulos","year":"0","journal-title":"Time and workload dependent device variability in circuit simulations"},{"key":"ref11","first-page":"352","article-title":"2012 IEEE 30th International Conference on Computer Design (ICCD)","author":"kamal","year":"0","journal-title":"An efficient reliability simulation flow for evaluating the hot carrier injection effect in CMOS VLSI circuits"},{"key":"ref12","first-page":"423","article-title":"Proceedings of DATE","author":"mihir","year":"0","journal-title":"Analytical Model for TDDB-based Performance Degradation in Combinational Logic"},{"key":"ref13","first-page":"552","article-title":"IEEE Transactions on Semiconductor Manufacturing","volume":"22","author":"jeong","year":"2009","journal-title":"Impact of Guardband Reduction On Design Outcomes A Quantitative Approach"},{"key":"ref14","first-page":"218","article-title":"7th (ISQED‘06)","volume":"6","author":"kumar","year":"2006","journal-title":"Impact of NBTI on SRAM Read Stability and Design for Reliability"},{"key":"ref15","first-page":"473","article-title":"IEEE (TDMR)","author":"carlson","year":"2007","journal-title":"Mechanism of Increase in SRAM Vmin Due to Negative-Bias Temperature Instability"},{"key":"ref16","first-page":"31:1","article-title":"DATE 2014","author":"seyab","year":"2014","journal-title":"Bias Temperature Instability analysis of FinFET based SRAM cells"},{"key":"ref17","article-title":"Ph.D Thesis Katholieke Universiteit Leuven","author":"weckx","year":"2016","journal-title":"Coping with Time-dependent Variability by a Combined Design and Technology Co-optimization"},{"key":"ref18","first-page":"1","article-title":"2013 8th IEEE (DTS)","author":"khan","year":"2013","journal-title":"Impact of partial resistive defects and Bias Temperature Instability on SRAM decoder reliability"},{"key":"ref19","first-page":"342","article-title":"13th (ISQED)","author":"menchaca","year":"2012","journal-title":"Impact of transistor aging effects on sense amplifier reliability in nano-scale CMOS"},{"key":"ref28","first-page":"1","article-title":"2015 IEEE 33rd VLSI Test Symposium (VTS)","author":"agbo","year":"0","journal-title":"Integral impact of BTI and voltage temperature variation on SRAM sense amplifier"},{"key":"ref4","first-page":"129","article-title":"2013 (DATE)","author":"hamdioui","year":"2013","journal-title":"Reliability challenges of real-time systems in forthcoming technology nodes"},{"key":"ref27","first-page":"1","article-title":"2013 8th IEEE Design and Test Symposium","author":"agbo","year":"0","journal-title":"BTI impact on SRAM sense amplifier"},{"key":"ref3","first-page":"3","article-title":"37th (MICRO-37)","author":"borkar","year":"2004","journal-title":"Microarchitecture and Design Challenges for Gigascale Integration"},{"key":"ref6","first-page":"76","article-title":"IEEE Design Test","author":"ray","year":"2016","journal-title":"The Changing Computing Paradigm with Internet of Things A Tutorial Introduction"},{"key":"ref29","first-page":"1","article-title":"2015 10th International conference on (DTIS)","author":"agbo","year":"0","journal-title":"Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier"},{"key":"ref5","first-page":"1","article-title":"2016 21th IEEE (ETS)","author":"marinissen","year":"2016","journal-title":"IoT Source of test challenges"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2004.03.019"},{"key":"ref7","first-page":"23","article-title":"IEEE Micro","author":"borkar","year":"1999","journal-title":"Design Challenges of Technology Scaling"},{"key":"ref2","first-page":"400","article-title":"33rd (ESSCIRC)","author":"wang","year":"2007","journal-title":"Statistical modeling for the minimum standby supply voltage of a full SRAM array"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIT.2006.1705198"},{"key":"ref1","year":"2005","journal-title":"International Technology Roadmap for Semiconductors 2005 [On-line]"},{"key":"ref46","first-page":"38:1","article-title":"ACM Comput. Surv","volume":"47","author":"rodopoulos","year":"2015","journal-title":"Classification Framework for Analysis and Modeling of Physically Induced Reliability Violations"},{"key":"ref20","first-page":"278","article-title":"34th ESSCIRC 2008","author":"cosemans","year":"2008","journal-title":"A 3 6pJ\/access 480MHz 128Kbit on-Chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variability"},{"key":"ref45","article-title":"Beckley, Ari-zona","year":"0","journal-title":"Predictive Technology Model"},{"key":"ref48","first-page":"1308","article-title":"IEEE Transactions on (VLSI) Systems","volume":"27","author":"kraak","year":"2019","journal-title":"Parametric and Functional Degradation Analysis of Complete 14-nm FinFET SRAM"},{"key":"ref22","first-page":"100","article-title":"2015 10th International Design Test Symposium (IDT)","volume":"87","author":"agbo","year":"0","journal-title":"BTI analysis of SRAM write driver"},{"key":"ref47","first-page":"231","article-title":"The 20th ASPDAC","author":"gebregiorgis","year":"2015","journal-title":"Aging mitigation in memory arrays using self-controlled bit-flipping technique"},{"key":"ref21","first-page":"852","article-title":"(DATE), 2017","author":"kinseher","year":"2017","journal-title":"Analyzing the effects of peripheral circuit aging of embedded SRAM architectures"},{"key":"ref42","first-page":"381","article-title":"2005 IEEE (IRPS), 2005. Proceedings. 43rd Annual","author":"kaczer","year":"0","journal-title":"Disorder-controlled-kinetics model for negative bias temperature instability and its experimental verification"},{"key":"ref24","first-page":"725","article-title":"2016 (ISVLSI)","author":"agbo","year":"2016","journal-title":"Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability"},{"key":"ref41","first-page":"ca.5.1","article-title":"2014 IEEE IRPS","author":"kukner","year":"2014","journal-title":"Scaling of BTI reliability in presence of time-zero variability"},{"key":"ref23","first-page":"52","article-title":"Microelec-tronics Reliability Journal","volume":"99","author":"agbo","year":"2019","journal-title":"Sense amplifier offset voltage analysis for both time-zero and time-dependent variability"},{"key":"ref44","first-page":"4a.2.1","article-title":"2011 (IRPS)","author":"kaczer","year":"2011","journal-title":"Response of a single trap to AC negative Bias Temperature stress"},{"key":"ref26","first-page":"1444","article-title":"IEEE Transactions on (VLSI) Systems","volume":"25","author":"agbo","year":"2017","journal-title":"Integral Impact of BTI PVT Variation and Workload on SRAM Sense Amplifier"},{"key":"ref43","first-page":"182","article-title":"IEEE (TDMR)","author":"kukner","year":"2014","journal-title":"Comparison of Reaction-Diffusion and Atomistic Trap-Based BTl Models for Logic Gates"},{"key":"ref25","first-page":"1","article-title":"2016 IEEE 19th International Symposium on (DDECS)","author":"agbo","year":"0","journal-title":"Comparative BTI analysis for various sense amplifier designs"}],"event":{"name":"2019 IEEE International Test Conference (ITC)","location":"Washington, DC, USA","start":{"date-parts":[[2019,11,9]]},"end":{"date-parts":[[2019,11,15]]}},"container-title":["2019 IEEE International Test Conference (ITC)"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/8977396\/9000108\/09000175.pdf?arnumber=9000175","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,20]],"date-time":"2025-08-20T18:38:06Z","timestamp":1755715086000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9000175\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2019,11]]},"references-count":48,"URL":"https:\/\/doi.org\/10.1109\/itc44170.2019.9000175","relation":{},"subject":[],"published":{"date-parts":[[2019,11]]}}}