{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,24]],"date-time":"2026-01-24T16:02:32Z","timestamp":1769270552441,"version":"3.49.0"},"reference-count":23,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2011,6,1]],"date-time":"2011-06-01T00:00:00Z","timestamp":1306886400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2011,6]]},"DOI":"10.1109\/jetcas.2011.2162159","type":"journal-article","created":{"date-parts":[[2011,8,15]],"date-time":"2011-08-15T20:50:04Z","timestamp":1313441404000},"page":"173-182","source":"Crossref","is-referenced-by-count":52,"title":["Benchmarking of Standard-Cell Based Memories in the Sub-$V_{\\rm T}$ Domain in 65-nm CMOS Technology"],"prefix":"10.1109","volume":"1","author":[{"given":"Pascal","family":"Meinerzhagen","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S. M. Yasser","family":"Sherazi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Andreas","family":"Burg","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Joachim Neves","family":"Rodrigues","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032493"},{"key":"ref11","doi-asserted-by":"crossref","first-page":"440","DOI":"10.1109\/TCSII.2010.2048360","article-title":"A sub-200-mV voltage-scalable SRAM with tolerance of access failure by self-activated bitline sensing","volume":"57","author":"luo","year":"2010","journal-title":"IEEE Trans Circuits Syst II Exp Briefs"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2048496"},{"key":"ref13","first-page":"330","article-title":"A high-density subthreshold SRAM with data-independent bitline leakage and virtual ground replica scheme","author":"kim","year":"2007","journal-title":"Proc IEEE Int Solid-State Circuits Conf (ISSCC)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2010.5548579"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ASSCC.2010.5716618"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/43.748162"},{"key":"ref17","author":"vittoz","year":"2004","journal-title":"Low-Power Electronics Design"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/92.920822"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1166\/jolpe.2008.185"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2004.1358745"},{"key":"ref3","first-page":"282","article-title":"A reconfigurable 65 nm SRAM achieving voltage scalability from 0.25&#x2013;1.2 V and performance scalability from 20 kHz&#x2013;200 MHz","author":"sinangil","year":"2008","journal-title":"Proc IEEE Eur Solid-State Circuits Conf (ESSCIRC)"},{"key":"ref6","article-title":"A <ref_formula><tex Notation=\"TeX\">$&#60;$<\/tex> <\/ref_formula>1 pJ sub-VT cardiac event detector in 65 nm LL-HVT CMOS","author":"rodrigues","year":"2010","journal-title":"Proc VLSI-SOC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.852162"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.891726"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.881549"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2004.833965"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/BSN.2006.38"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2007.373427"},{"key":"ref20","article-title":"High-level energy estimation in the sub-VT domain: Simulation and measurement of a cardiac event detector","author":"akgun","year":"0","journal-title":"IEEE Trans Biomed Circuits Syst"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.873215"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.852159"},{"key":"ref23","author":"yeo","year":"2005","journal-title":"Low-Voltage Low-Power VLSI Subsystems"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/5503868\/5986803\/05976987.pdf?arnumber=5976987","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:47:42Z","timestamp":1633909662000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5976987\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,6]]},"references-count":23,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2011.2162159","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"value":"2156-3357","type":"print"},{"value":"2156-3365","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,6]]}}}