{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,8]],"date-time":"2026-04-08T16:25:19Z","timestamp":1775665519247,"version":"3.50.1"},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2013,3,1]],"date-time":"2013-03-01T00:00:00Z","timestamp":1362096000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE J. Emerg. Sel. Topics Circuits Syst."],"published-print":{"date-parts":[[2013,3]]},"DOI":"10.1109\/jetcas.2013.2243031","type":"journal-article","created":{"date-parts":[[2013,2,26]],"date-time":"2013-02-26T19:41:35Z","timestamp":1361907695000},"page":"23-34","source":"Crossref","is-referenced-by-count":40,"title":["Synchronous-Logic and Asynchronous-Logic 8051 Microcontroller Cores for Realizing the Internet of Things: A Comparative Study on Dynamic Voltage Scaling and Variation Effects"],"prefix":"10.1109","volume":"3","author":[{"given":"Kok-Leong","family":"Chang","sequence":"first","affiliation":[]},{"given":"Joseph S.","family":"Chang","sequence":"additional","affiliation":[]},{"given":"Bah-Hwee","family":"Gwee","sequence":"additional","affiliation":[]},{"given":"Kwen-Siong","family":"Chong","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2003.1199163"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2005285"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.923238"},{"key":"ref30","author":"bardsley","year":"2000","journal-title":"Implementing Balsa Handshake Circuits"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/1024393.1024397"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/89.701361"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TBME.2005.844043"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/43.924824"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2009.935693"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2034764"},{"key":"ref15","year":"2009","journal-title":"International Roadmap for Semiconductors"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2036764"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1998.666497"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.860958"},{"key":"ref19","first-page":"204","article-title":"A theory of asynchronous circuits","author":"muller","year":"1959","journal-title":"Proc Int Symp Theory Switch"},{"key":"ref28","author":"mackenzie","year":"2007","journal-title":"The 8051 Microcontroller"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2181678"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2034233"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1002\/0471224146"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.875789"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.1996.542821"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917553"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/81.852942"},{"key":"ref7","first-page":"488","article-title":"The asynchronous 24 MB on-chip level-3 cache for a dual-core itanium-family processor","volume":"1","author":"wuu","year":"2005","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref2","author":"keister","year":"1951","journal-title":"The Design of Switching Circuits"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2035449"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/4.179201"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.21236\/ADA447727"},{"key":"ref22","first-page":"3181","article-title":"A low-energy low-voltage asynchronous 8051 microcontroller core","author":"chang","year":"2006","journal-title":"Proc IEEE Int Symp Circuits Syst"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.903039"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2009.27"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.1998.666497"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1983.1052035"},{"key":"ref25","author":"wang","year":"2006","journal-title":"Sub-Threshold Design for Ultra Low-Power Systems"}],"container-title":["IEEE Journal on Emerging and Selected Topics in Circuits and Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5503868\/6475966\/06471249.pdf?arnumber=6471249","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,12,23]],"date-time":"2021-12-23T11:26:18Z","timestamp":1640258778000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6471249\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,3]]},"references-count":34,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/jetcas.2013.2243031","relation":{},"ISSN":["2156-3357","2156-3365"],"issn-type":[{"value":"2156-3357","type":"print"},{"value":"2156-3365","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,3]]}}}